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tile/PCI: use cached pci_dev->pcie_mpss to simplify code
The PCI core caches the "PCIe Max Payload Size Supported" in pci_dev->pcie_mpss, so use that instead of pcie_capability_read_dword(). Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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@ -251,15 +251,12 @@ static void fixup_read_and_payload_sizes(void)
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/* Scan for the smallest maximum payload size. */
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for_each_pci_dev(dev) {
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u32 devcap;
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int max_payload;
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if (!pci_is_pcie(dev))
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continue;
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pcie_capability_read_dword(dev, PCI_EXP_DEVCAP, &devcap);
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max_payload = devcap & PCI_EXP_DEVCAP_PAYLOAD;
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if (max_payload < smallest_max_payload)
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smallest_max_payload = max_payload;
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if (dev->pcie_mpss < smallest_max_payload)
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smallest_max_payload = dev->pcie_mpss;
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}
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/* Now, set the max_payload_size for all devices to that value. */
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