crypto: powerpc/aes - kernel config

Integrate the module into the kernel configuration

Signed-off-by: Markus Stockhausen <stockhausen@collogia.de>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This commit is contained in:
Markus Stockhausen 2015-02-22 10:00:10 +01:00 committed by Herbert Xu
parent 8a28a1a894
commit 504c6143c5
2 changed files with 15 additions and 0 deletions

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@ -4,8 +4,10 @@
# Arch-specific CryptoAPI modules. # Arch-specific CryptoAPI modules.
# #
obj-$(CONFIG_CRYPTO_AES_PPC_SPE) += aes-ppc-spe.o
obj-$(CONFIG_CRYPTO_SHA1_PPC) += sha1-powerpc.o obj-$(CONFIG_CRYPTO_SHA1_PPC) += sha1-powerpc.o
obj-$(CONFIG_CRYPTO_SHA256_PPC_SPE) += sha256-ppc-spe.o obj-$(CONFIG_CRYPTO_SHA256_PPC_SPE) += sha256-ppc-spe.o
aes-ppc-spe-y := aes-spe-core.o aes-spe-keys.o aes-tab-4k.o aes-spe-modes.o aes_spe_glue.o
sha1-powerpc-y := sha1-powerpc-asm.o sha1.o sha1-powerpc-y := sha1-powerpc-asm.o sha1.o
sha256-ppc-spe-y := sha256-spe-asm.o sha256_spe_glue.o sha256-ppc-spe-y := sha256-spe-asm.o sha256_spe_glue.o

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@ -866,6 +866,19 @@ config CRYPTO_AES_ARM_BS
This implementation does not rely on any lookup tables so it is This implementation does not rely on any lookup tables so it is
believed to be invulnerable to cache timing attacks. believed to be invulnerable to cache timing attacks.
config CRYPTO_AES_PPC_SPE
tristate "AES cipher algorithms (PPC SPE)"
depends on PPC && SPE
help
AES cipher algorithms (FIPS-197). Additionally the acceleration
for popular block cipher modes ECB, CBC, CTR and XTS is supported.
This module should only be used for low power (router) devices
without hardware AES acceleration (e.g. caam crypto). It reduces the
size of the AES tables from 16KB to 8KB + 256 bytes and mitigates
timining attacks. Nevertheless it might be not as secure as other
architecture specific assembler implementations that work on 1KB
tables or 256 bytes S-boxes.
config CRYPTO_ANUBIS config CRYPTO_ANUBIS
tristate "Anubis cipher algorithm" tristate "Anubis cipher algorithm"
select CRYPTO_ALGAPI select CRYPTO_ALGAPI