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ARM: dts: OMAP: Add counter-32k nodes
Adds the counter-32k timers nodes present in OMAP2/3/4 devices and device-tree binding documentation for OMAP counter-32k. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
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Documentation/devicetree/bindings/arm/omap/counter.txt
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15
Documentation/devicetree/bindings/arm/omap/counter.txt
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@ -0,0 +1,15 @@
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OMAP Counter-32K bindings
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Required properties:
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- compatible: Must be "ti,omap-counter32k" for OMAP controllers
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- reg: Contains timer register address range (base address and length)
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- ti,hwmods: Name of the hwmod associated to the counter, which is typically
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"counter_32k"
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Example:
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counter32k: counter@4a304000 {
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compatible = "ti,omap-counter32k";
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reg = <0x4a304000 0x20>;
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ti,hwmods = "counter_32k";
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};
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@ -14,6 +14,12 @@
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compatible = "ti,omap2420", "ti,omap2";
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ocp {
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counter32k: counter@48004000 {
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compatible = "ti,omap-counter32k";
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reg = <0x48004000 0x20>;
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ti,hwmods = "counter_32k";
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};
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omap2420_pmx: pinmux@48000030 {
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compatible = "ti,omap2420-padconf", "pinctrl-single";
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reg = <0x48000030 0x0113>;
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@ -14,6 +14,12 @@
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compatible = "ti,omap2430", "ti,omap2";
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ocp {
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counter32k: counter@49020000 {
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compatible = "ti,omap-counter32k";
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reg = <0x49020000 0x20>;
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ti,hwmods = "counter_32k";
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};
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omap2430_pmx: pinmux@49002030 {
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compatible = "ti,omap2430-padconf", "pinctrl-single";
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reg = <0x49002030 0x0154>;
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@ -61,6 +61,12 @@
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ranges;
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ti,hwmods = "l3_main";
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counter32k: counter@48320000 {
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compatible = "ti,omap-counter32k";
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reg = <0x48320000 0x20>;
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ti,hwmods = "counter_32k";
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};
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intc: interrupt-controller@48200000 {
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compatible = "ti,omap2-intc";
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interrupt-controller;
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@ -95,6 +95,12 @@
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ranges;
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ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
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counter32k: counter@4a304000 {
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compatible = "ti,omap-counter32k";
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reg = <0x4a304000 0x20>;
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ti,hwmods = "counter_32k";
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};
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omap4_pmx_core: pinmux@4a100040 {
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compatible = "ti,omap4-padconf", "pinctrl-single";
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reg = <0x4a100040 0x0196>;
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