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Staging: comedi: add ni_65xx driver
Driver for National Instruments PCI-6514 From: Jon Grierson <jd@renko.co.uk> Cc: David Schleef <ds@schleef.org> Cc: Ian Abbott <abbotti@mev.co.uk> Cc: Frank Mori Hess <fmhess@users.sourceforge.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
Jon Grierson
Greg Kroah-Hartman
parent
ef2ccffba4
commit
5211d97cda
805
drivers/staging/comedi/drivers/ni_65xx.c
Normal file
805
drivers/staging/comedi/drivers/ni_65xx.c
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@ -0,0 +1,805 @@
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/*
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comedi/drivers/ni_6514.c
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driver for National Instruments PCI-6514
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Copyright (C) 2006 Jon Grierson <jd@renko.co.uk>
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Copyright (C) 2006 Frank Mori Hess <fmhess@users.sourceforge.net>
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COMEDI - Linux Control and Measurement Device Interface
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Copyright (C) 1999,2002,2003 David A. Schleef <ds@schleef.org>
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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/*
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Driver: ni_65xx
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Description: National Instruments 65xx static dio boards
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Author: Jon Grierson <jd@renko.co.uk>, Frank Mori Hess <fmhess@users.sourceforge.net>
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Status: testing
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Devices: [National Instruments] PCI-6509 (ni_65xx), PXI-6509, PCI-6510, PCI-6511,
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PXI-6511, PCI-6512, PXI-6512, PCI-6513, PXI-6513, PCI-6514, PXI-6514, PCI-6515,
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PXI-6515, PCI-6516, PCI-6517, PCI-6518, PCI-6519, PCI-6520, PCI-6521, PXI-6521,
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PCI-6528, PXI-6528
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Updated: Wed Oct 18 08:59:11 EDT 2006
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Based on the PCI-6527 driver by ds.
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The interrupt subdevice (subdevice 3) is probably broken for all boards
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except maybe the 6514.
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*/
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/*
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Manuals (available from ftp://ftp.natinst.com/support/manuals)
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370106b.pdf 6514 Register Level Programmer Manual
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*/
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#define _GNU_SOURCE
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#define DEBUG 1
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#define DEBUG_FLAGS
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#include "../comedidev.h"
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#include "mite.h"
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#define NI6514_DIO_SIZE 4096
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#define NI6514_MITE_SIZE 4096
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#define NI_65XX_MAX_NUM_PORTS 12
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static const unsigned ni_65xx_channels_per_port = 8;
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static const unsigned ni_65xx_port_offset = 0x10;
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static inline unsigned Port_Data(unsigned port)
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{
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return 0x40 + port * ni_65xx_port_offset;
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}
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static inline unsigned Port_Select(unsigned port)
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{
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return 0x41 + port * ni_65xx_port_offset;
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}
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static inline unsigned Rising_Edge_Detection_Enable(unsigned port)
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{
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return 0x42 + port * ni_65xx_port_offset;
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}
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static inline unsigned Falling_Edge_Detection_Enable(unsigned port)
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{
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return 0x43 + port * ni_65xx_port_offset;
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}
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static inline unsigned Filter_Enable(unsigned port)
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{
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return 0x44 + port * ni_65xx_port_offset;
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}
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#define ID_Register 0x00
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#define Clear_Register 0x01
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#define ClrEdge 0x08
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#define ClrOverflow 0x04
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#define Filter_Interval 0x08
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#define Change_Status 0x02
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#define MasterInterruptStatus 0x04
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#define Overflow 0x02
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#define EdgeStatus 0x01
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#define Master_Interrupt_Control 0x03
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#define FallingEdgeIntEnable 0x10
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#define RisingEdgeIntEnable 0x08
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#define MasterInterruptEnable 0x04
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#define OverflowIntEnable 0x02
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#define EdgeIntEnable 0x01
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static int ni_65xx_attach(comedi_device * dev, comedi_devconfig * it);
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static int ni_65xx_detach(comedi_device * dev);
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static comedi_driver driver_ni_65xx = {
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driver_name:"ni_65xx",
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module:THIS_MODULE,
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attach:ni_65xx_attach,
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detach:ni_65xx_detach,
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};
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typedef struct {
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int dev_id;
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const char *name;
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unsigned num_dio_ports;
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unsigned num_di_ports;
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unsigned num_do_ports;
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unsigned invert_outputs:1;
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} ni_65xx_board;
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static const ni_65xx_board ni_65xx_boards[] = {
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{
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dev_id: 0x7085,
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name: "pci-6509",
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num_dio_ports:12,
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invert_outputs:0},
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{
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dev_id: 0x1710,
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name: "pxi-6509",
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num_dio_ports:12,
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invert_outputs:0},
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{
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dev_id: 0x7124,
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name: "pci-6510",
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num_di_ports:4},
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{
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dev_id: 0x70c3,
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name: "pci-6511",
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num_di_ports:8},
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{
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dev_id: 0x70d3,
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name: "pxi-6511",
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num_di_ports:8},
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{
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dev_id: 0x70cc,
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name: "pci-6512",
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num_do_ports:8},
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{
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dev_id: 0x70d2,
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name: "pxi-6512",
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num_do_ports:8},
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{
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dev_id: 0x70c8,
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name: "pci-6513",
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num_do_ports:8,
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invert_outputs:1},
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{
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dev_id: 0x70d1,
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name: "pxi-6513",
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num_do_ports:8,
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invert_outputs:1},
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{
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dev_id: 0x7088,
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name: "pci-6514",
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num_di_ports:4,
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num_do_ports:4,
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invert_outputs:1},
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{
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dev_id: 0x70CD,
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name: "pxi-6514",
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num_di_ports:4,
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num_do_ports:4,
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invert_outputs:1},
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{
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dev_id: 0x7087,
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name: "pci-6515",
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num_di_ports:4,
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num_do_ports:4,
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invert_outputs:1},
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{
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dev_id: 0x70c9,
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name: "pxi-6515",
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num_di_ports:4,
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num_do_ports:4,
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invert_outputs:1},
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{
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dev_id: 0x7125,
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name: "pci-6516",
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num_do_ports:4,
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invert_outputs:1},
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{
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dev_id: 0x7126,
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name: "pci-6517",
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num_do_ports:4,
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invert_outputs:1},
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{
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dev_id: 0x7127,
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name: "pci-6518",
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num_di_ports:2,
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num_do_ports:2,
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invert_outputs:1},
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{
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dev_id: 0x7128,
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name: "pci-6519",
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num_di_ports:2,
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num_do_ports:2,
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invert_outputs:1},
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{
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dev_id: 0x71c5,
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name: "pci-6520",
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num_di_ports:1,
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num_do_ports:1,
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},
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{
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dev_id: 0x718b,
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name: "pci-6521",
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num_di_ports:1,
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num_do_ports:1,
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},
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{
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dev_id: 0x718c,
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name: "pxi-6521",
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num_di_ports:1,
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num_do_ports:1,
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},
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{
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dev_id: 0x70a9,
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name: "pci-6528",
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num_di_ports:3,
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num_do_ports:3,
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},
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{
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dev_id: 0x7086,
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name: "pxi-6528",
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num_di_ports:3,
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num_do_ports:3,
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},
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};
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#define n_ni_65xx_boards (sizeof(ni_65xx_boards)/sizeof(ni_65xx_boards[0]))
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static inline const ni_65xx_board *board(comedi_device * dev)
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{
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return dev->board_ptr;
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}
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static inline unsigned ni_65xx_port_by_channel(unsigned channel)
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{
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return channel / ni_65xx_channels_per_port;
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}
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static inline unsigned ni_65xx_total_num_ports(const ni_65xx_board * board)
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{
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return board->num_dio_ports + board->num_di_ports + board->num_do_ports;
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}
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static DEFINE_PCI_DEVICE_TABLE(ni_65xx_pci_table) = {
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{PCI_VENDOR_ID_NATINST, 0x1710, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
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{PCI_VENDOR_ID_NATINST, 0x7085, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
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{PCI_VENDOR_ID_NATINST, 0x7086, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
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{PCI_VENDOR_ID_NATINST, 0x7087, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
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{PCI_VENDOR_ID_NATINST, 0x7088, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
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{PCI_VENDOR_ID_NATINST, 0x70a9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
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{PCI_VENDOR_ID_NATINST, 0x70c3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
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{PCI_VENDOR_ID_NATINST, 0x70c8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
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{PCI_VENDOR_ID_NATINST, 0x70c9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
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{PCI_VENDOR_ID_NATINST, 0x70cc, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
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{PCI_VENDOR_ID_NATINST, 0x70CD, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
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{PCI_VENDOR_ID_NATINST, 0x70d1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
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{PCI_VENDOR_ID_NATINST, 0x70d2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
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{PCI_VENDOR_ID_NATINST, 0x70d3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
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{PCI_VENDOR_ID_NATINST, 0x7124, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
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{PCI_VENDOR_ID_NATINST, 0x7125, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
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{PCI_VENDOR_ID_NATINST, 0x7126, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
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{PCI_VENDOR_ID_NATINST, 0x7127, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
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{PCI_VENDOR_ID_NATINST, 0x7128, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
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{PCI_VENDOR_ID_NATINST, 0x718b, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
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{PCI_VENDOR_ID_NATINST, 0x718c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
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{PCI_VENDOR_ID_NATINST, 0x71c5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
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{0}
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};
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MODULE_DEVICE_TABLE(pci, ni_65xx_pci_table);
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typedef struct {
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struct mite_struct *mite;
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unsigned int filter_interval;
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unsigned short filter_enable[NI_65XX_MAX_NUM_PORTS];
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unsigned short output_bits[NI_65XX_MAX_NUM_PORTS];
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unsigned short dio_direction[NI_65XX_MAX_NUM_PORTS];
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} ni_65xx_private;
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static inline ni_65xx_private *private(comedi_device * dev)
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{
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return dev->private;
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}
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typedef struct {
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unsigned base_port;
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} ni_65xx_subdevice_private;
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static inline ni_65xx_subdevice_private *sprivate(comedi_subdevice * subdev)
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{
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return subdev->private;
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}
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static ni_65xx_subdevice_private *ni_65xx_alloc_subdevice_private(void)
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{
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ni_65xx_subdevice_private *subdev_private =
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kzalloc(sizeof(ni_65xx_subdevice_private), GFP_KERNEL);
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if (subdev_private == NULL)
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return NULL;
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return subdev_private;
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}
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static int ni_65xx_find_device(comedi_device * dev, int bus, int slot);
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static int ni_65xx_config_filter(comedi_device * dev, comedi_subdevice * s,
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comedi_insn * insn, lsampl_t * data)
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{
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const unsigned chan = CR_CHAN(insn->chanspec);
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const unsigned port =
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sprivate(s)->base_port + ni_65xx_port_by_channel(chan);
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if (data[0] != INSN_CONFIG_FILTER)
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return -EINVAL;
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if (data[1]) {
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static const unsigned filter_resolution_ns = 200;
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static const unsigned max_filter_interval = 0xfffff;
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unsigned interval =
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(data[1] +
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(filter_resolution_ns / 2)) / filter_resolution_ns;
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if (interval > max_filter_interval)
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interval = max_filter_interval;
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data[1] = interval * filter_resolution_ns;
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if (interval != private(dev)->filter_interval) {
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writeb(interval,
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private(dev)->mite->daq_io_addr +
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Filter_Interval);
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private(dev)->filter_interval = interval;
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}
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private(dev)->filter_enable[port] |=
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1 << (chan % ni_65xx_channels_per_port);
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} else {
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private(dev)->filter_enable[port] &=
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~(1 << (chan % ni_65xx_channels_per_port));
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}
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writeb(private(dev)->filter_enable[port],
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private(dev)->mite->daq_io_addr + Filter_Enable(port));
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return 2;
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}
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static int ni_65xx_dio_insn_config(comedi_device * dev, comedi_subdevice * s,
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comedi_insn * insn, lsampl_t * data)
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{
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unsigned port;
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if (insn->n < 1)
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return -EINVAL;
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port = sprivate(s)->base_port +
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ni_65xx_port_by_channel(CR_CHAN(insn->chanspec));
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switch (data[0]) {
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case INSN_CONFIG_FILTER:
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return ni_65xx_config_filter(dev, s, insn, data);
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break;
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case INSN_CONFIG_DIO_OUTPUT:
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if (s->type != COMEDI_SUBD_DIO)
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return -EINVAL;
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private(dev)->dio_direction[port] = COMEDI_OUTPUT;
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writeb(0, private(dev)->mite->daq_io_addr + Port_Select(port));
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return 1;
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break;
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case INSN_CONFIG_DIO_INPUT:
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if (s->type != COMEDI_SUBD_DIO)
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return -EINVAL;
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private(dev)->dio_direction[port] = COMEDI_INPUT;
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writeb(1, private(dev)->mite->daq_io_addr + Port_Select(port));
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return 1;
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break;
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case INSN_CONFIG_DIO_QUERY:
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if (s->type != COMEDI_SUBD_DIO)
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return -EINVAL;
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data[1] = private(dev)->dio_direction[port];
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return insn->n;
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break;
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default:
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break;
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}
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return -EINVAL;
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}
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static int ni_65xx_dio_insn_bits(comedi_device * dev, comedi_subdevice * s,
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comedi_insn * insn, lsampl_t * data)
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{
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unsigned base_bitfield_channel;
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const unsigned max_ports_per_bitfield = 5;
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unsigned read_bits = 0;
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unsigned j;
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if (insn->n != 2)
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return -EINVAL;
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base_bitfield_channel = CR_CHAN(insn->chanspec);
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for (j = 0; j < max_ports_per_bitfield; ++j) {
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const unsigned port =
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sprivate(s)->base_port +
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ni_65xx_port_by_channel(base_bitfield_channel) + j;
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unsigned base_port_channel;
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unsigned port_mask, port_data, port_read_bits;
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int bitshift;
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if (port >= ni_65xx_total_num_ports(board(dev)))
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break;
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base_port_channel = port * ni_65xx_channels_per_port;
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port_mask = data[0];
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port_data = data[1];
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bitshift = base_port_channel - base_bitfield_channel;
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if (bitshift >= 32 || bitshift <= -32)
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break;
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if (bitshift > 0) {
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port_mask >>= bitshift;
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port_data >>= bitshift;
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} else {
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port_mask <<= -bitshift;
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port_data <<= -bitshift;
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}
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port_mask &= 0xff;
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port_data &= 0xff;
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if (port_mask) {
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unsigned bits;
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private(dev)->output_bits[port] &= ~port_mask;
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private(dev)->output_bits[port] |=
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port_data & port_mask;
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bits = private(dev)->output_bits[port];
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if (board(dev)->invert_outputs)
|
||||
bits = ~bits;
|
||||
writeb(bits,
|
||||
private(dev)->mite->daq_io_addr +
|
||||
Port_Data(port));
|
||||
// rt_printk("wrote 0x%x to port %i\n", bits, port);
|
||||
}
|
||||
port_read_bits =
|
||||
readb(private(dev)->mite->daq_io_addr +
|
||||
Port_Data(port));
|
||||
// rt_printk("read 0x%x from port %i\n", port_read_bits, port);
|
||||
if (bitshift > 0) {
|
||||
port_read_bits <<= bitshift;
|
||||
} else {
|
||||
port_read_bits >>= -bitshift;
|
||||
}
|
||||
read_bits |= port_read_bits;
|
||||
}
|
||||
data[1] = read_bits;
|
||||
return insn->n;
|
||||
}
|
||||
|
||||
static irqreturn_t ni_65xx_interrupt(int irq, void *d PT_REGS_ARG)
|
||||
{
|
||||
comedi_device *dev = d;
|
||||
comedi_subdevice *s = dev->subdevices + 2;
|
||||
unsigned int status;
|
||||
|
||||
status = readb(private(dev)->mite->daq_io_addr + Change_Status);
|
||||
if ((status & MasterInterruptStatus) == 0)
|
||||
return IRQ_NONE;
|
||||
if ((status & EdgeStatus) == 0)
|
||||
return IRQ_NONE;
|
||||
|
||||
writeb(ClrEdge | ClrOverflow,
|
||||
private(dev)->mite->daq_io_addr + Clear_Register);
|
||||
|
||||
comedi_buf_put(s->async, 0);
|
||||
s->async->events |= COMEDI_CB_EOS;
|
||||
comedi_event(dev, s);
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static int ni_65xx_intr_cmdtest(comedi_device * dev, comedi_subdevice * s,
|
||||
comedi_cmd * cmd)
|
||||
{
|
||||
int err = 0;
|
||||
int tmp;
|
||||
|
||||
/* step 1: make sure trigger sources are trivially valid */
|
||||
|
||||
tmp = cmd->start_src;
|
||||
cmd->start_src &= TRIG_NOW;
|
||||
if (!cmd->start_src || tmp != cmd->start_src)
|
||||
err++;
|
||||
|
||||
tmp = cmd->scan_begin_src;
|
||||
cmd->scan_begin_src &= TRIG_OTHER;
|
||||
if (!cmd->scan_begin_src || tmp != cmd->scan_begin_src)
|
||||
err++;
|
||||
|
||||
tmp = cmd->convert_src;
|
||||
cmd->convert_src &= TRIG_FOLLOW;
|
||||
if (!cmd->convert_src || tmp != cmd->convert_src)
|
||||
err++;
|
||||
|
||||
tmp = cmd->scan_end_src;
|
||||
cmd->scan_end_src &= TRIG_COUNT;
|
||||
if (!cmd->scan_end_src || tmp != cmd->scan_end_src)
|
||||
err++;
|
||||
|
||||
tmp = cmd->stop_src;
|
||||
cmd->stop_src &= TRIG_COUNT;
|
||||
if (!cmd->stop_src || tmp != cmd->stop_src)
|
||||
err++;
|
||||
|
||||
if (err)
|
||||
return 1;
|
||||
|
||||
/* step 2: make sure trigger sources are unique and mutually compatible */
|
||||
|
||||
if (err)
|
||||
return 2;
|
||||
|
||||
/* step 3: make sure arguments are trivially compatible */
|
||||
|
||||
if (cmd->start_arg != 0) {
|
||||
cmd->start_arg = 0;
|
||||
err++;
|
||||
}
|
||||
if (cmd->scan_begin_arg != 0) {
|
||||
cmd->scan_begin_arg = 0;
|
||||
err++;
|
||||
}
|
||||
if (cmd->convert_arg != 0) {
|
||||
cmd->convert_arg = 0;
|
||||
err++;
|
||||
}
|
||||
|
||||
if (cmd->scan_end_arg != 1) {
|
||||
cmd->scan_end_arg = 1;
|
||||
err++;
|
||||
}
|
||||
if (cmd->stop_arg != 0) {
|
||||
cmd->stop_arg = 0;
|
||||
err++;
|
||||
}
|
||||
|
||||
if (err)
|
||||
return 3;
|
||||
|
||||
/* step 4: fix up any arguments */
|
||||
|
||||
if (err)
|
||||
return 4;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ni_65xx_intr_cmd(comedi_device * dev, comedi_subdevice * s)
|
||||
{
|
||||
//comedi_cmd *cmd = &s->async->cmd;
|
||||
|
||||
writeb(ClrEdge | ClrOverflow,
|
||||
private(dev)->mite->daq_io_addr + Clear_Register);
|
||||
writeb(FallingEdgeIntEnable | RisingEdgeIntEnable |
|
||||
MasterInterruptEnable | EdgeIntEnable,
|
||||
private(dev)->mite->daq_io_addr + Master_Interrupt_Control);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ni_65xx_intr_cancel(comedi_device * dev, comedi_subdevice * s)
|
||||
{
|
||||
writeb(0x00,
|
||||
private(dev)->mite->daq_io_addr + Master_Interrupt_Control);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ni_65xx_intr_insn_bits(comedi_device * dev, comedi_subdevice * s,
|
||||
comedi_insn * insn, lsampl_t * data)
|
||||
{
|
||||
if (insn->n < 1)
|
||||
return -EINVAL;
|
||||
|
||||
data[1] = 0;
|
||||
return 2;
|
||||
}
|
||||
|
||||
static int ni_65xx_intr_insn_config(comedi_device * dev, comedi_subdevice * s,
|
||||
comedi_insn * insn, lsampl_t * data)
|
||||
{
|
||||
if (insn->n < 1)
|
||||
return -EINVAL;
|
||||
if (data[0] != INSN_CONFIG_CHANGE_NOTIFY)
|
||||
return -EINVAL;
|
||||
|
||||
writeb(data[1],
|
||||
private(dev)->mite->daq_io_addr +
|
||||
Rising_Edge_Detection_Enable(0));
|
||||
writeb(data[1] >> 8,
|
||||
private(dev)->mite->daq_io_addr +
|
||||
Rising_Edge_Detection_Enable(0x10));
|
||||
writeb(data[1] >> 16,
|
||||
private(dev)->mite->daq_io_addr +
|
||||
Rising_Edge_Detection_Enable(0x20));
|
||||
writeb(data[1] >> 24,
|
||||
private(dev)->mite->daq_io_addr +
|
||||
Rising_Edge_Detection_Enable(0x30));
|
||||
|
||||
writeb(data[2],
|
||||
private(dev)->mite->daq_io_addr +
|
||||
Falling_Edge_Detection_Enable(0));
|
||||
writeb(data[2] >> 8,
|
||||
private(dev)->mite->daq_io_addr +
|
||||
Falling_Edge_Detection_Enable(0x10));
|
||||
writeb(data[2] >> 16,
|
||||
private(dev)->mite->daq_io_addr +
|
||||
Falling_Edge_Detection_Enable(0x20));
|
||||
writeb(data[2] >> 24,
|
||||
private(dev)->mite->daq_io_addr +
|
||||
Falling_Edge_Detection_Enable(0x30));
|
||||
|
||||
return 2;
|
||||
}
|
||||
|
||||
static int ni_65xx_attach(comedi_device * dev, comedi_devconfig * it)
|
||||
{
|
||||
comedi_subdevice *s;
|
||||
unsigned i;
|
||||
int ret;
|
||||
|
||||
printk("comedi%d: ni_65xx:", dev->minor);
|
||||
|
||||
if ((ret = alloc_private(dev, sizeof(ni_65xx_private))) < 0)
|
||||
return ret;
|
||||
|
||||
ret = ni_65xx_find_device(dev, it->options[0], it->options[1]);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
ret = mite_setup(private(dev)->mite);
|
||||
if (ret < 0) {
|
||||
printk("error setting up mite\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
dev->board_name = board(dev)->name;
|
||||
dev->irq = mite_irq(private(dev)->mite);
|
||||
printk(" %s", dev->board_name);
|
||||
|
||||
printk(" ID=0x%02x",
|
||||
readb(private(dev)->mite->daq_io_addr + ID_Register));
|
||||
|
||||
if ((ret = alloc_subdevices(dev, 4)) < 0)
|
||||
return ret;
|
||||
|
||||
s = dev->subdevices + 0;
|
||||
if (board(dev)->num_di_ports) {
|
||||
s->type = COMEDI_SUBD_DI;
|
||||
s->subdev_flags = SDF_READABLE;
|
||||
s->n_chan =
|
||||
board(dev)->num_di_ports * ni_65xx_channels_per_port;
|
||||
s->range_table = &range_digital;
|
||||
s->maxdata = 1;
|
||||
s->insn_config = ni_65xx_dio_insn_config;
|
||||
s->insn_bits = ni_65xx_dio_insn_bits;
|
||||
s->private = ni_65xx_alloc_subdevice_private();
|
||||
if (s->private == NULL)
|
||||
return -ENOMEM;
|
||||
sprivate(s)->base_port = 0;
|
||||
} else {
|
||||
s->type = COMEDI_SUBD_UNUSED;
|
||||
}
|
||||
|
||||
s = dev->subdevices + 1;
|
||||
if (board(dev)->num_do_ports) {
|
||||
s->type = COMEDI_SUBD_DO;
|
||||
s->subdev_flags = SDF_READABLE | SDF_WRITABLE;
|
||||
s->n_chan =
|
||||
board(dev)->num_do_ports * ni_65xx_channels_per_port;
|
||||
s->range_table = &range_digital;
|
||||
s->maxdata = 1;
|
||||
s->insn_bits = ni_65xx_dio_insn_bits;
|
||||
s->private = ni_65xx_alloc_subdevice_private();
|
||||
if (s->private == NULL)
|
||||
return -ENOMEM;
|
||||
sprivate(s)->base_port = board(dev)->num_di_ports;
|
||||
} else {
|
||||
s->type = COMEDI_SUBD_UNUSED;
|
||||
}
|
||||
|
||||
s = dev->subdevices + 2;
|
||||
if (board(dev)->num_dio_ports) {
|
||||
s->type = COMEDI_SUBD_DIO;
|
||||
s->subdev_flags = SDF_READABLE | SDF_WRITABLE;
|
||||
s->n_chan =
|
||||
board(dev)->num_dio_ports * ni_65xx_channels_per_port;
|
||||
s->range_table = &range_digital;
|
||||
s->maxdata = 1;
|
||||
s->insn_config = ni_65xx_dio_insn_config;
|
||||
s->insn_bits = ni_65xx_dio_insn_bits;
|
||||
s->private = ni_65xx_alloc_subdevice_private();
|
||||
if (s->private == NULL)
|
||||
return -ENOMEM;
|
||||
sprivate(s)->base_port = 0;
|
||||
for (i = 0; i < board(dev)->num_dio_ports; ++i) {
|
||||
// configure all ports for input
|
||||
writeb(0x1,
|
||||
private(dev)->mite->daq_io_addr +
|
||||
Port_Select(i));
|
||||
}
|
||||
} else {
|
||||
s->type = COMEDI_SUBD_UNUSED;
|
||||
}
|
||||
|
||||
s = dev->subdevices + 3;
|
||||
dev->read_subdev = s;
|
||||
s->type = COMEDI_SUBD_DI;
|
||||
s->subdev_flags = SDF_READABLE | SDF_CMD_READ;
|
||||
s->n_chan = 1;
|
||||
s->range_table = &range_unknown;
|
||||
s->maxdata = 1;
|
||||
s->do_cmdtest = ni_65xx_intr_cmdtest;
|
||||
s->do_cmd = ni_65xx_intr_cmd;
|
||||
s->cancel = ni_65xx_intr_cancel;
|
||||
s->insn_bits = ni_65xx_intr_insn_bits;
|
||||
s->insn_config = ni_65xx_intr_insn_config;
|
||||
|
||||
for (i = 0; i < ni_65xx_total_num_ports(board(dev)); ++i) {
|
||||
writeb(0x00,
|
||||
private(dev)->mite->daq_io_addr + Filter_Enable(i));
|
||||
if (board(dev)->invert_outputs)
|
||||
writeb(0x01,
|
||||
private(dev)->mite->daq_io_addr + Port_Data(i));
|
||||
else
|
||||
writeb(0x00,
|
||||
private(dev)->mite->daq_io_addr + Port_Data(i));
|
||||
}
|
||||
writeb(ClrEdge | ClrOverflow,
|
||||
private(dev)->mite->daq_io_addr + Clear_Register);
|
||||
writeb(0x00,
|
||||
private(dev)->mite->daq_io_addr + Master_Interrupt_Control);
|
||||
|
||||
/* Set filter interval to 0 (32bit reg) */
|
||||
writeb(0x00000000, private(dev)->mite->daq_io_addr + Filter_Interval);
|
||||
|
||||
ret = comedi_request_irq(dev->irq, ni_65xx_interrupt, IRQF_SHARED,
|
||||
"ni_65xx", dev);
|
||||
if (ret < 0) {
|
||||
dev->irq = 0;
|
||||
printk(" irq not available");
|
||||
}
|
||||
|
||||
printk("\n");
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ni_65xx_detach(comedi_device * dev)
|
||||
{
|
||||
if (private(dev) && private(dev)->mite
|
||||
&& private(dev)->mite->daq_io_addr) {
|
||||
writeb(0x00,
|
||||
private(dev)->mite->daq_io_addr +
|
||||
Master_Interrupt_Control);
|
||||
}
|
||||
|
||||
if (dev->irq) {
|
||||
comedi_free_irq(dev->irq, dev);
|
||||
}
|
||||
|
||||
if (private(dev)) {
|
||||
unsigned i;
|
||||
for (i = 0; i < dev->n_subdevices; ++i) {
|
||||
if (dev->subdevices[i].private) {
|
||||
kfree(dev->subdevices[i].private);
|
||||
dev->subdevices[i].private = NULL;
|
||||
}
|
||||
}
|
||||
if (private(dev)->mite) {
|
||||
mite_unsetup(private(dev)->mite);
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ni_65xx_find_device(comedi_device * dev, int bus, int slot)
|
||||
{
|
||||
struct mite_struct *mite;
|
||||
int i;
|
||||
|
||||
for (mite = mite_devices; mite; mite = mite->next) {
|
||||
if (mite->used)
|
||||
continue;
|
||||
if (bus || slot) {
|
||||
if (bus != mite->pcidev->bus->number ||
|
||||
slot != PCI_SLOT(mite->pcidev->devfn))
|
||||
continue;
|
||||
}
|
||||
for (i = 0; i < n_ni_65xx_boards; i++) {
|
||||
if (mite_device_id(mite) == ni_65xx_boards[i].dev_id) {
|
||||
dev->board_ptr = ni_65xx_boards + i;
|
||||
private(dev)->mite = mite;
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
printk("no device found\n");
|
||||
mite_list_devices();
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
COMEDI_PCI_INITCLEANUP(driver_ni_65xx, ni_65xx_pci_table);
|
||||
Loading…
Reference in New Issue
Block a user