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dt-bindings: Add documentation for GM20B GPU
GM20B's definition is mostly similar to GK20A's, but requires an additional clock. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
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@ -1,9 +1,10 @@
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NVIDIA GK20A Graphics Processing Unit
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NVIDIA Tegra Graphics Processing Units
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Required properties:
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- compatible: "nvidia,<gpu>"
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Currently recognized values:
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- nvidia,gk20a
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- nvidia,gm20b
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- reg: Physical base address and length of the controller's registers.
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Must contain two entries:
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- first entry for bar0
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@ -19,6 +20,9 @@ Required properties:
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- clock-names: Must include the following entries:
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- gpu
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- pwr
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If the compatible string is "nvidia,gm20b", then the following clock
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is also required:
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- ref
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- resets: Must contain an entry for each entry in reset-names.
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See ../reset/reset.txt for details.
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- reset-names: Must include the following entries:
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@ -27,9 +31,9 @@ Required properties:
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Optional properties:
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- iommus: A reference to the IOMMU. See ../iommu/iommu.txt for details.
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Example:
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Example for GK20A:
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gpu@0,57000000 {
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gpu@57000000 {
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compatible = "nvidia,gk20a";
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reg = <0x0 0x57000000 0x0 0x01000000>,
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<0x0 0x58000000 0x0 0x01000000>;
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@ -45,3 +49,22 @@ Example:
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iommus = <&mc TEGRA_SWGROUP_GPU>;
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status = "disabled";
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};
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Example for GM20B:
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gpu@57000000 {
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compatible = "nvidia,gm20b";
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reg = <0x0 0x57000000 0x0 0x01000000>,
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<0x0 0x58000000 0x0 0x01000000>;
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interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "stall", "nonstall";
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clocks = <&tegra_car TEGRA210_CLK_GPU>,
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<&tegra_car TEGRA210_CLK_PLL_P_OUT5>,
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<&tegra_car TEGRA210_CLK_PLL_G_REF>;
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clock-names = "gpu", "pwr", "ref";
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resets = <&tegra_car 184>;
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reset-names = "gpu";
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iommus = <&mc TEGRA_SWGROUP_GPU>;
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status = "disabled";
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};
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