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mmc: sdhci-of-esdhc: set proper dma mask for ls104x chips
SDHCI controller in ls1043a and ls1046a generate 40-bit wide addresses when doing DMA. Make sure that the corresponding dma mask is correctly configured. Context: when enabling smmu on these chips the following problem is encountered: the smmu input address size is 48 bits so the dma mappings for sdhci end up 48-bit wide. However, on these chips sdhci only use 40-bits of that address size when doing dma. So you end up with a 48-bit address translation in smmu but the device generates transactions with clipped 40-bit addresses, thus smmu context faults are triggered. Setting up the correct dma mask fixes this situation. Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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@ -22,6 +22,7 @@
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#include <linux/sys_soc.h>
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#include <linux/clk.h>
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#include <linux/ktime.h>
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#include <linux/dma-mapping.h>
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#include <linux/mmc/host.h>
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#include "sdhci-pltfm.h"
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#include "sdhci-esdhc.h"
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@ -472,6 +473,11 @@ static void esdhc_of_adma_workaround(struct sdhci_host *host, u32 intmask)
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static int esdhc_of_enable_dma(struct sdhci_host *host)
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{
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u32 value;
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struct device *dev = mmc_dev(host->mmc);
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if (of_device_is_compatible(dev->of_node, "fsl,ls1043a-esdhc") ||
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of_device_is_compatible(dev->of_node, "fsl,ls1046a-esdhc"))
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dma_set_mask_and_coherent(dev, DMA_BIT_MASK(40));
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value = sdhci_readl(host, ESDHC_DMA_SYSCTL);
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value |= ESDHC_DMA_SNOOP;
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