mirror of
https://github.com/FEX-Emu/linux.git
synced 2024-12-15 21:30:43 +00:00
Merge branch 'drm-intel-next' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel
* 'drm-intel-next' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel: drm/i915: fix up error path leak in i915_cmdbuffer drm/i915: fix unpaired i915 device mutex on entervt failure. drm/i915: add support for G41 chipset drm/i915: Enable ASLE if present drm/i915: Unregister ACPI video driver when exiting drm/i915: Register ACPI video even when not modesetting drm/i915: fix transition to I915_TILING_NONE drm/i915: Don't let an oops get triggered from irq_emit without dma init. drm/i915: allow tiled front buffers on 965+
This commit is contained in:
commit
56a50adda4
@ -2296,7 +2296,7 @@ static int __init acpi_video_init(void)
|
||||
return acpi_video_register();
|
||||
}
|
||||
|
||||
static void __exit acpi_video_exit(void)
|
||||
void __exit acpi_video_exit(void)
|
||||
{
|
||||
|
||||
acpi_bus_unregister_driver(&acpi_video_bus);
|
||||
@ -2305,6 +2305,7 @@ static void __exit acpi_video_exit(void)
|
||||
|
||||
return;
|
||||
}
|
||||
EXPORT_SYMBOL(acpi_video_exit);
|
||||
|
||||
module_init(acpi_video_init);
|
||||
module_exit(acpi_video_exit);
|
||||
|
@ -713,18 +713,18 @@ static int i915_cmdbuffer(struct drm_device *dev, void *data,
|
||||
mutex_unlock(&dev->struct_mutex);
|
||||
if (ret) {
|
||||
DRM_ERROR("i915_dispatch_cmdbuffer failed\n");
|
||||
goto fail_batch_free;
|
||||
goto fail_clip_free;
|
||||
}
|
||||
|
||||
if (sarea_priv)
|
||||
sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
|
||||
|
||||
fail_batch_free:
|
||||
drm_free(batch_data, cmdbuf->sz, DRM_MEM_DRIVER);
|
||||
fail_clip_free:
|
||||
drm_free(cliprects,
|
||||
cmdbuf->num_cliprects * sizeof(struct drm_clip_rect),
|
||||
DRM_MEM_DRIVER);
|
||||
fail_batch_free:
|
||||
drm_free(batch_data, cmdbuf->sz, DRM_MEM_DRIVER);
|
||||
|
||||
return ret;
|
||||
}
|
||||
@ -1232,7 +1232,7 @@ int i915_driver_unload(struct drm_device *dev)
|
||||
if (dev_priv->regs != NULL)
|
||||
iounmap(dev_priv->regs);
|
||||
|
||||
intel_opregion_free(dev);
|
||||
intel_opregion_free(dev, 0);
|
||||
|
||||
if (drm_core_check_feature(dev, DRIVER_MODESET)) {
|
||||
intel_modeset_cleanup(dev);
|
||||
|
@ -77,7 +77,7 @@ static int i915_suspend(struct drm_device *dev, pm_message_t state)
|
||||
drm_irq_uninstall(dev);
|
||||
}
|
||||
|
||||
intel_opregion_free(dev);
|
||||
intel_opregion_free(dev, 1);
|
||||
|
||||
if (state.event == PM_EVENT_SUSPEND) {
|
||||
/* Shut down the device */
|
||||
|
@ -674,12 +674,12 @@ extern int i915_restore_state(struct drm_device *dev);
|
||||
#ifdef CONFIG_ACPI
|
||||
/* i915_opregion.c */
|
||||
extern int intel_opregion_init(struct drm_device *dev, int resume);
|
||||
extern void intel_opregion_free(struct drm_device *dev);
|
||||
extern void intel_opregion_free(struct drm_device *dev, int suspend);
|
||||
extern void opregion_asle_intr(struct drm_device *dev);
|
||||
extern void opregion_enable_asle(struct drm_device *dev);
|
||||
#else
|
||||
static inline int intel_opregion_init(struct drm_device *dev, int resume) { return 0; }
|
||||
static inline void intel_opregion_free(struct drm_device *dev) { return; }
|
||||
static inline void intel_opregion_free(struct drm_device *dev, int suspend) { return; }
|
||||
static inline void opregion_asle_intr(struct drm_device *dev) { return; }
|
||||
static inline void opregion_enable_asle(struct drm_device *dev) { return; }
|
||||
#endif
|
||||
@ -787,7 +787,8 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
|
||||
(dev)->pci_device == 0x2A42 || \
|
||||
(dev)->pci_device == 0x2E02 || \
|
||||
(dev)->pci_device == 0x2E12 || \
|
||||
(dev)->pci_device == 0x2E22)
|
||||
(dev)->pci_device == 0x2E22 || \
|
||||
(dev)->pci_device == 0x2E32)
|
||||
|
||||
#define IS_I965GM(dev) ((dev)->pci_device == 0x2A02)
|
||||
|
||||
@ -796,6 +797,7 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
|
||||
#define IS_G4X(dev) ((dev)->pci_device == 0x2E02 || \
|
||||
(dev)->pci_device == 0x2E12 || \
|
||||
(dev)->pci_device == 0x2E22 || \
|
||||
(dev)->pci_device == 0x2E32 || \
|
||||
IS_GM45(dev))
|
||||
|
||||
#define IS_IGDG(dev) ((dev)->pci_device == 0xa001)
|
||||
|
@ -4087,8 +4087,10 @@ i915_gem_entervt_ioctl(struct drm_device *dev, void *data,
|
||||
dev_priv->mm.suspended = 0;
|
||||
|
||||
ret = i915_gem_init_ringbuffer(dev);
|
||||
if (ret != 0)
|
||||
if (ret != 0) {
|
||||
mutex_unlock(&dev->struct_mutex);
|
||||
return ret;
|
||||
}
|
||||
|
||||
spin_lock(&dev_priv->mm.active_list_lock);
|
||||
BUG_ON(!list_empty(&dev_priv->mm.active_list));
|
||||
|
@ -283,7 +283,6 @@ i915_gem_set_tiling(struct drm_device *dev, void *data,
|
||||
mutex_lock(&dev->struct_mutex);
|
||||
|
||||
if (args->tiling_mode == I915_TILING_NONE) {
|
||||
obj_priv->tiling_mode = I915_TILING_NONE;
|
||||
args->swizzle_mode = I915_BIT_6_SWIZZLE_NONE;
|
||||
} else {
|
||||
if (args->tiling_mode == I915_TILING_X)
|
||||
|
@ -406,7 +406,7 @@ int i915_irq_emit(struct drm_device *dev, void *data,
|
||||
drm_i915_irq_emit_t *emit = data;
|
||||
int result;
|
||||
|
||||
if (!dev_priv) {
|
||||
if (!dev_priv || !dev_priv->ring.virtual_start) {
|
||||
DRM_ERROR("called with no initialization\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
@ -386,6 +386,7 @@ int intel_opregion_init(struct drm_device *dev, int resume)
|
||||
if (mboxes & MBOX_ASLE) {
|
||||
DRM_DEBUG("ASLE supported\n");
|
||||
opregion->asle = base + OPREGION_ASLE_OFFSET;
|
||||
opregion_enable_asle(dev);
|
||||
}
|
||||
|
||||
if (!resume)
|
||||
@ -409,7 +410,7 @@ err_out:
|
||||
return err;
|
||||
}
|
||||
|
||||
void intel_opregion_free(struct drm_device *dev)
|
||||
void intel_opregion_free(struct drm_device *dev, int suspend)
|
||||
{
|
||||
struct drm_i915_private *dev_priv = dev->dev_private;
|
||||
struct intel_opregion *opregion = &dev_priv->opregion;
|
||||
@ -417,6 +418,9 @@ void intel_opregion_free(struct drm_device *dev)
|
||||
if (!opregion->enabled)
|
||||
return;
|
||||
|
||||
if (!suspend)
|
||||
acpi_video_exit();
|
||||
|
||||
opregion->acpi->drdy = 0;
|
||||
|
||||
system_opregion = NULL;
|
||||
|
@ -1446,6 +1446,7 @@
|
||||
#define DISPPLANE_NO_LINE_DOUBLE 0
|
||||
#define DISPPLANE_STEREO_POLARITY_FIRST 0
|
||||
#define DISPPLANE_STEREO_POLARITY_SECOND (1<<18)
|
||||
#define DISPPLANE_TILED (1<<10)
|
||||
#define DSPAADDR 0x70184
|
||||
#define DSPASTRIDE 0x70188
|
||||
#define DSPAPOS 0x7018C /* reserved */
|
||||
|
@ -657,6 +657,7 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
|
||||
int dspbase = (pipe == 0 ? DSPAADDR : DSPBADDR);
|
||||
int dspsurf = (pipe == 0 ? DSPASURF : DSPBSURF);
|
||||
int dspstride = (pipe == 0) ? DSPASTRIDE : DSPBSTRIDE;
|
||||
int dsptileoff = (pipe == 0 ? DSPATILEOFF : DSPBTILEOFF);
|
||||
int dspcntr_reg = (pipe == 0) ? DSPACNTR : DSPBCNTR;
|
||||
u32 dspcntr, alignment;
|
||||
int ret;
|
||||
@ -733,6 +734,13 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
|
||||
mutex_unlock(&dev->struct_mutex);
|
||||
return -EINVAL;
|
||||
}
|
||||
if (IS_I965G(dev)) {
|
||||
if (obj_priv->tiling_mode != I915_TILING_NONE)
|
||||
dspcntr |= DISPPLANE_TILED;
|
||||
else
|
||||
dspcntr &= ~DISPPLANE_TILED;
|
||||
}
|
||||
|
||||
I915_WRITE(dspcntr_reg, dspcntr);
|
||||
|
||||
Start = obj_priv->gtt_offset;
|
||||
@ -745,6 +753,7 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
|
||||
I915_READ(dspbase);
|
||||
I915_WRITE(dspsurf, Start);
|
||||
I915_READ(dspsurf);
|
||||
I915_WRITE(dsptileoff, (y << 16) | x);
|
||||
} else {
|
||||
I915_WRITE(dspbase, Start + Offset);
|
||||
I915_READ(dspbase);
|
||||
|
@ -3,8 +3,10 @@
|
||||
|
||||
#if (defined CONFIG_ACPI_VIDEO || defined CONFIG_ACPI_VIDEO_MODULE)
|
||||
extern int acpi_video_register(void);
|
||||
extern int acpi_video_exit(void);
|
||||
#else
|
||||
static inline int acpi_video_register(void) { return 0; }
|
||||
static inline void acpi_video_exit(void) { return; }
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
@ -532,6 +532,7 @@
|
||||
{0x8086, 0x2e02, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
|
||||
{0x8086, 0x2e12, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
|
||||
{0x8086, 0x2e22, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
|
||||
{0x8086, 0x2e32, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
|
||||
{0x8086, 0xa001, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
|
||||
{0x8086, 0xa011, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
|
||||
{0x8086, 0x35e8, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
|
||||
|
Loading…
Reference in New Issue
Block a user