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mtd: IFC NAND: Add support of ONFI NAND flash

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- Fix NAND_CMD_READID command for ONFI detect.
  - Add NAND_CMD_PARAM command to read the ONFI parameter page.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
This commit is contained in:
Prabhakar Kushwaha 2012-04-09 10:55:22 +05:30 committed by David Woodhouse
parent 287558fe0e
commit 59fdd5b96a
1 changed files with 16 additions and 6 deletions
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22
drivers/mtd/nand/fsl_ifc_nand.c
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@ -375,21 +375,31 @@ static void fsl_ifc_cmdfunc(struct mtd_info *mtd, unsigned int command,
return; return;
/* READID must read all 8 possible bytes */
case NAND_CMD_READID: case NAND_CMD_READID:
case NAND_CMD_PARAM: {
int timing = IFC_FIR_OP_RB;
if (command == NAND_CMD_PARAM)
timing = IFC_FIR_OP_RBCD;
out_be32(&ifc->ifc_nand.nand_fir0, out_be32(&ifc->ifc_nand.nand_fir0,
(IFC_FIR_OP_CMD0 << IFC_NAND_FIR0_OP0_SHIFT) | (IFC_FIR_OP_CMD0 << IFC_NAND_FIR0_OP0_SHIFT) |
(IFC_FIR_OP_UA << IFC_NAND_FIR0_OP1_SHIFT) | (IFC_FIR_OP_UA << IFC_NAND_FIR0_OP1_SHIFT) |
(IFC_FIR_OP_RB << IFC_NAND_FIR0_OP2_SHIFT)); (timing << IFC_NAND_FIR0_OP2_SHIFT));
out_be32(&ifc->ifc_nand.nand_fcr0, out_be32(&ifc->ifc_nand.nand_fcr0,
NAND_CMD_READID << IFC_NAND_FCR0_CMD0_SHIFT); command << IFC_NAND_FCR0_CMD0_SHIFT);
/* 8 bytes for manuf, device and exts */ out_be32(&ifc->ifc_nand.row3, column);
out_be32(&ifc->ifc_nand.nand_fbcr, 8);
ifc_nand_ctrl->read_bytes = 8; /*
* although currently it's 8 bytes for READID, we always read
* the maximum 256 bytes(for PARAM)
*/
out_be32(&ifc->ifc_nand.nand_fbcr, 256);
ifc_nand_ctrl->read_bytes = 256;
set_addr(mtd, 0, 0, 0); set_addr(mtd, 0, 0, 0);
fsl_ifc_run_command(mtd); fsl_ifc_run_command(mtd);
return; return;
}
/* ERASE1 stores the block and page address */ /* ERASE1 stores the block and page address */
case NAND_CMD_ERASE1: case NAND_CMD_ERASE1: