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igb: Refactor of init_nvm_params
This patch refactors the init_nvm_params functions for 82575 and adds a new function for the i210/i211 devices in order to configure separately the NVM functionality for the i210/i211 family. Signed-off-by: Carolyn Wyborny <carolyn.wyborny@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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@ -238,6 +238,7 @@ static s32 igb_init_nvm_params_82575(struct e1000_hw *hw)
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size = (u16)((eecd & E1000_EECD_SIZE_EX_MASK) >>
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E1000_EECD_SIZE_EX_SHIFT);
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/* Added to a constant, "size" becomes the left-shift value
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* for setting word_size.
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*/
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@ -250,86 +251,52 @@ static s32 igb_init_nvm_params_82575(struct e1000_hw *hw)
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size = 15;
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nvm->word_size = 1 << size;
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if (hw->mac.type < e1000_i210) {
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nvm->opcode_bits = 8;
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nvm->delay_usec = 1;
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nvm->opcode_bits = 8;
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nvm->delay_usec = 1;
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switch (nvm->override) {
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case e1000_nvm_override_spi_large:
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nvm->page_size = 32;
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nvm->address_bits = 16;
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break;
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case e1000_nvm_override_spi_small:
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nvm->page_size = 8;
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nvm->address_bits = 8;
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break;
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default:
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nvm->page_size = eecd & E1000_EECD_ADDR_BITS ? 32 : 8;
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nvm->address_bits = eecd & E1000_EECD_ADDR_BITS ?
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16 : 8;
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break;
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}
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if (nvm->word_size == (1 << 15))
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nvm->page_size = 128;
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nvm->type = e1000_nvm_eeprom_spi;
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} else {
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nvm->type = e1000_nvm_flash_hw;
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switch (nvm->override) {
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case e1000_nvm_override_spi_large:
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nvm->page_size = 32;
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nvm->address_bits = 16;
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break;
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case e1000_nvm_override_spi_small:
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nvm->page_size = 8;
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nvm->address_bits = 8;
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break;
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default:
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nvm->page_size = eecd & E1000_EECD_ADDR_BITS ? 32 : 8;
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nvm->address_bits = eecd & E1000_EECD_ADDR_BITS ?
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16 : 8;
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break;
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}
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if (nvm->word_size == (1 << 15))
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nvm->page_size = 128;
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nvm->type = e1000_nvm_eeprom_spi;
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/* NVM Function Pointers */
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nvm->ops.acquire = igb_acquire_nvm_82575;
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nvm->ops.release = igb_release_nvm_82575;
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nvm->ops.write = igb_write_nvm_spi;
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nvm->ops.validate = igb_validate_nvm_checksum;
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nvm->ops.update = igb_update_nvm_checksum;
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if (nvm->word_size < (1 << 15))
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nvm->ops.read = igb_read_nvm_eerd;
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else
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nvm->ops.read = igb_read_nvm_spi;
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/* override generic family function pointers for specific descendants */
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switch (hw->mac.type) {
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case e1000_82580:
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nvm->ops.validate = igb_validate_nvm_checksum_82580;
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nvm->ops.update = igb_update_nvm_checksum_82580;
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nvm->ops.acquire = igb_acquire_nvm_82575;
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nvm->ops.release = igb_release_nvm_82575;
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if (nvm->word_size < (1 << 15))
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nvm->ops.read = igb_read_nvm_eerd;
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else
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nvm->ops.read = igb_read_nvm_spi;
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nvm->ops.write = igb_write_nvm_spi;
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break;
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case e1000_i354:
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case e1000_i350:
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nvm->ops.validate = igb_validate_nvm_checksum_i350;
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nvm->ops.update = igb_update_nvm_checksum_i350;
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nvm->ops.acquire = igb_acquire_nvm_82575;
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nvm->ops.release = igb_release_nvm_82575;
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if (nvm->word_size < (1 << 15))
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nvm->ops.read = igb_read_nvm_eerd;
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else
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nvm->ops.read = igb_read_nvm_spi;
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nvm->ops.write = igb_write_nvm_spi;
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break;
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case e1000_i210:
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nvm->ops.validate = igb_validate_nvm_checksum_i210;
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nvm->ops.update = igb_update_nvm_checksum_i210;
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nvm->ops.acquire = igb_acquire_nvm_i210;
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nvm->ops.release = igb_release_nvm_i210;
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nvm->ops.read = igb_read_nvm_srrd_i210;
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nvm->ops.write = igb_write_nvm_srwr_i210;
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nvm->ops.valid_led_default = igb_valid_led_default_i210;
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break;
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case e1000_i211:
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nvm->ops.acquire = igb_acquire_nvm_i210;
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nvm->ops.release = igb_release_nvm_i210;
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nvm->ops.read = igb_read_nvm_i211;
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nvm->ops.valid_led_default = igb_valid_led_default_i210;
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nvm->ops.validate = NULL;
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nvm->ops.update = NULL;
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nvm->ops.write = NULL;
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break;
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default:
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nvm->ops.validate = igb_validate_nvm_checksum;
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nvm->ops.update = igb_update_nvm_checksum;
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nvm->ops.acquire = igb_acquire_nvm_82575;
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nvm->ops.release = igb_release_nvm_82575;
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if (nvm->word_size < (1 << 15))
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nvm->ops.read = igb_read_nvm_eerd;
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else
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nvm->ops.read = igb_read_nvm_spi;
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nvm->ops.write = igb_write_nvm_spi;
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break;
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}
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@ -601,6 +568,15 @@ static s32 igb_get_invariants_82575(struct e1000_hw *hw)
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/* NVM initialization */
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ret_val = igb_init_nvm_params_82575(hw);
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switch (hw->mac.type) {
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case e1000_i210:
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case e1000_i211:
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ret_val = igb_init_nvm_params_i210(hw);
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break;
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default:
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break;
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}
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if (ret_val)
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goto out;
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@ -620,6 +620,7 @@
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#define E1000_EECD_SIZE_EX_SHIFT 11
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#define E1000_EECD_FLUPD_I210 0x00800000 /* Update FLASH */
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#define E1000_EECD_FLUDONE_I210 0x04000000 /* Update FLASH done*/
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#define E1000_EECD_FLASH_DETECTED_I210 0x00080000 /* FLASH detected */
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#define E1000_FLUDONE_ATTEMPTS 20000
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#define E1000_EERD_EEWR_MAX_COUNT 512 /* buffered EEPROM words rw */
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#define E1000_I210_FIFO_SEL_RX 0x00
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@ -110,6 +110,7 @@ enum e1000_nvm_type {
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e1000_nvm_none,
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e1000_nvm_eeprom_spi,
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e1000_nvm_flash_hw,
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e1000_nvm_invm,
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e1000_nvm_flash_sw
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};
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@ -660,6 +660,23 @@ static s32 igb_pool_flash_update_done_i210(struct e1000_hw *hw)
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return ret_val;
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}
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/**
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* igb_get_flash_presence_i210 - Check if flash device is detected.
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* @hw: pointer to the HW structure
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*
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**/
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bool igb_get_flash_presence_i210(struct e1000_hw *hw)
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{
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u32 eec = 0;
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bool ret_val = false;
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eec = rd32(E1000_EECD);
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if (eec & E1000_EECD_FLASH_DETECTED_I210)
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ret_val = true;
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return ret_val;
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}
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/**
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* igb_update_flash_i210 - Commit EEPROM to the flash
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* @hw: pointer to the HW structure
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@ -786,3 +803,33 @@ s32 igb_write_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr, u16 data)
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{
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return __igb_access_xmdio_reg(hw, addr, dev_addr, &data, false);
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}
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/**
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* igb_init_nvm_params_i210 - Init NVM func ptrs.
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* @hw: pointer to the HW structure
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**/
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s32 igb_init_nvm_params_i210(struct e1000_hw *hw)
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{
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s32 ret_val = 0;
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struct e1000_nvm_info *nvm = &hw->nvm;
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nvm->ops.acquire = igb_acquire_nvm_i210;
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nvm->ops.release = igb_release_nvm_i210;
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nvm->ops.valid_led_default = igb_valid_led_default_i210;
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/* NVM Function Pointers */
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if (igb_get_flash_presence_i210(hw)) {
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hw->nvm.type = e1000_nvm_flash_hw;
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nvm->ops.read = igb_read_nvm_srrd_i210;
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nvm->ops.write = igb_write_nvm_srwr_i210;
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nvm->ops.validate = igb_validate_nvm_checksum_i210;
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nvm->ops.update = igb_update_nvm_checksum_i210;
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} else {
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hw->nvm.type = e1000_nvm_invm;
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nvm->ops.read = igb_read_nvm_i211;
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nvm->ops.write = NULL;
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nvm->ops.validate = NULL;
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nvm->ops.update = NULL;
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}
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return ret_val;
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}
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@ -49,6 +49,8 @@ extern s32 igb_read_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr,
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u16 *data);
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extern s32 igb_write_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr,
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u16 data);
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extern s32 igb_init_nvm_params_i210(struct e1000_hw *hw);
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extern bool igb_get_flash_presence_i210(struct e1000_hw *hw);
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#define E1000_STM_OPCODE 0xDB00
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#define E1000_EEPROM_FLASH_SIZE_WORD 0x11
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