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fpga pr ip: Platform driver for Altera Partial Reconfiguration IP.

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This adds a platform bus driver for a fpga-mgr driver
that uses the Altera Partial Reconfiguration IP component.

Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
Acked-by: Alan Tull <atull@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Matthew Gerlach 2017-03-23 19:34:30 -05:00 committed by Greg Kroah-Hartman
parent 6e761cd77b
commit 5b73cb5b01
3 changed files with 76 additions and 0 deletions
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7
drivers/fpga/Kconfig
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@ -88,6 +88,13 @@ config ALTERA_PR_IP_CORE
help
Core driver support for Altera Partial Reconfiguration IP component
config ALTERA_PR_IP_CORE_PLAT
tristate "Platform support of Altera Partial Reconfiguration IP Core"
depends on ALTERA_PR_IP_CORE && OF && HAS_IOMEM
help
Platform driver support for Altera Partial Reconfiguration IP
component
endif # FPGA
endmenu

1
drivers/fpga/Makefile
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@ -13,6 +13,7 @@ obj-$(CONFIG_FPGA_MGR_TS73XX) += ts73xx-fpga.o
obj-$(CONFIG_FPGA_MGR_XILINX_SPI) += xilinx-spi.o
obj-$(CONFIG_FPGA_MGR_ZYNQ_FPGA) += zynq-fpga.o
obj-$(CONFIG_ALTERA_PR_IP_CORE) += altera-pr-ip-core.o
obj-$(CONFIG_ALTERA_PR_IP_CORE_PLAT) += altera-pr-ip-core-plat.o
# FPGA Bridge Drivers
obj-$(CONFIG_FPGA_BRIDGE) += fpga-bridge.o

68
drivers/fpga/altera-pr-ip-core-plat.c Normal file
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@ -0,0 +1,68 @@
/*
* Driver for Altera Partial Reconfiguration IP Core
*
* Copyright (C) 2016-2017 Intel Corporation
*
* Based on socfpga-a10.c Copyright (C) 2015-2016 Altera Corporation
* by Alan Tull <atull@opensource.altera.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include <linux/fpga/altera-pr-ip-core.h>
#include <linux/module.h>
#include <linux/of_device.h>
static int alt_pr_platform_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
void __iomem *reg_base;
struct resource *res;
/* First mmio base is for register access */
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
reg_base = devm_ioremap_resource(dev, res);
if (IS_ERR(reg_base))
return PTR_ERR(reg_base);
return alt_pr_register(dev, reg_base);
}
static int alt_pr_platform_remove(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
return alt_pr_unregister(dev);
}
static const struct of_device_id alt_pr_of_match[] = {
{ .compatible = "altr,a10-pr-ip", },
{},
};
MODULE_DEVICE_TABLE(of, alt_pr_of_match);
static struct platform_driver alt_pr_platform_driver = {
.probe = alt_pr_platform_probe,
.remove = alt_pr_platform_remove,
.driver = {
.name = "alt_a10_pr_ip",
.of_match_table = alt_pr_of_match,
},
};
module_platform_driver(alt_pr_platform_driver);
MODULE_AUTHOR("Matthew Gerlach <matthew.gerlach@linux.intel.com>");
MODULE_DESCRIPTION("Altera Partial Reconfiguration IP Platform Driver");
MODULE_LICENSE("GPL v2");