mirror of
https://github.com/FEX-Emu/linux.git
synced 2024-12-14 04:41:26 +00:00
Merge branch 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx
* 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx: dmaengine: at_hdmac: fix buffer transfer size specification fsldma: fix issue of slow dma dmaengine i.MX SDMA: initialize on module_init dma : EG20T PCH: Fix miss-setting DMA descriptor intel_mid_dma: fix section mismatch warnings dmaengine: imx-sdma: fix bug in buffer descriptor initialization drivers/dma/ppc4xx: Use printf extension %pR for struct resource drivers/dma/ioat: Use the ccflag-y instead of EXTRA_CFLAGS drivers/dma/: Use the ccflag-y instead of EXTRA_CFLAGS dma: intel_mid_dma: fix double free on mid_setup_dma error path dma: imx-dma: fix imxdma_probe error path
This commit is contained in:
commit
5d43a1de26
@ -1,8 +1,8 @@
|
||||
ifeq ($(CONFIG_DMADEVICES_DEBUG),y)
|
||||
EXTRA_CFLAGS += -DDEBUG
|
||||
ccflags-y += -DDEBUG
|
||||
endif
|
||||
ifeq ($(CONFIG_DMADEVICES_VDEBUG),y)
|
||||
EXTRA_CFLAGS += -DVERBOSE_DEBUG
|
||||
ccflags-y += -DVERBOSE_DEBUG
|
||||
endif
|
||||
|
||||
obj-$(CONFIG_DMA_ENGINE) += dmaengine.o
|
||||
|
@ -722,7 +722,7 @@ atc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
|
||||
desc->lli.daddr = mem;
|
||||
desc->lli.ctrla = ctrla
|
||||
| ATC_DST_WIDTH(mem_width)
|
||||
| len >> mem_width;
|
||||
| len >> reg_width;
|
||||
desc->lli.ctrlb = ctrlb;
|
||||
|
||||
if (!first) {
|
||||
|
@ -50,9 +50,11 @@ static void dma_init(struct fsldma_chan *chan)
|
||||
* EIE - Error interrupt enable
|
||||
* EOSIE - End of segments interrupt enable (basic mode)
|
||||
* EOLNIE - End of links interrupt enable
|
||||
* BWC - Bandwidth sharing among channels
|
||||
*/
|
||||
DMA_OUT(chan, &chan->regs->mr, FSL_DMA_MR_EIE
|
||||
| FSL_DMA_MR_EOLNIE | FSL_DMA_MR_EOSIE, 32);
|
||||
DMA_OUT(chan, &chan->regs->mr, FSL_DMA_MR_BWC
|
||||
| FSL_DMA_MR_EIE | FSL_DMA_MR_EOLNIE
|
||||
| FSL_DMA_MR_EOSIE, 32);
|
||||
break;
|
||||
case FSL_DMA_IP_83XX:
|
||||
/* Set the channel to below modes:
|
||||
|
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
|
||||
* Copyright (C) 2007-2010 Freescale Semiconductor, Inc. All rights reserved.
|
||||
*
|
||||
* Author:
|
||||
* Zhang Wei <wei.zhang@freescale.com>, Jul 2007
|
||||
@ -36,6 +36,13 @@
|
||||
#define FSL_DMA_MR_DAHE 0x00002000
|
||||
#define FSL_DMA_MR_SAHE 0x00001000
|
||||
|
||||
/*
|
||||
* Bandwidth/pause control determines how many bytes a given
|
||||
* channel is allowed to transfer before the DMA engine pauses
|
||||
* the current channel and switches to the next channel
|
||||
*/
|
||||
#define FSL_DMA_MR_BWC 0x08000000
|
||||
|
||||
/* Special MR definition for MPC8349 */
|
||||
#define FSL_DMA_MR_EOTIE 0x00000080
|
||||
#define FSL_DMA_MR_PRC_RM 0x00000800
|
||||
|
@ -379,7 +379,7 @@ static int __init imxdma_probe(struct platform_device *pdev)
|
||||
return 0;
|
||||
|
||||
err_init:
|
||||
while (i-- >= 0) {
|
||||
while (--i >= 0) {
|
||||
struct imxdma_channel *imxdmac = &imxdma->channel[i];
|
||||
imx_dma_free(imxdmac->imxdma_channel);
|
||||
}
|
||||
|
@ -951,7 +951,7 @@ static struct dma_async_tx_descriptor *sdma_prep_slave_sg(
|
||||
struct sdma_buffer_descriptor *bd = &sdmac->bd[i];
|
||||
int param;
|
||||
|
||||
bd->buffer_addr = sgl->dma_address;
|
||||
bd->buffer_addr = sg->dma_address;
|
||||
|
||||
count = sg->length;
|
||||
|
||||
@ -1385,7 +1385,7 @@ static int __init sdma_module_init(void)
|
||||
{
|
||||
return platform_driver_probe(&sdma_driver, sdma_probe);
|
||||
}
|
||||
subsys_initcall(sdma_module_init);
|
||||
module_init(sdma_module_init);
|
||||
|
||||
MODULE_AUTHOR("Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>");
|
||||
MODULE_DESCRIPTION("i.MX SDMA driver");
|
||||
|
@ -1075,7 +1075,6 @@ static int mid_setup_dma(struct pci_dev *pdev)
|
||||
if (NULL == dma->dma_pool) {
|
||||
pr_err("ERR_MDMA:pci_pool_create failed\n");
|
||||
err = -ENOMEM;
|
||||
kfree(dma);
|
||||
goto err_dma_pool;
|
||||
}
|
||||
|
||||
@ -1186,7 +1185,6 @@ err_engine:
|
||||
free_irq(pdev->irq, dma);
|
||||
err_irq:
|
||||
pci_pool_destroy(dma->dma_pool);
|
||||
kfree(dma);
|
||||
err_dma_pool:
|
||||
pr_err("ERR_MDMA:setup_dma failed: %d\n", err);
|
||||
return err;
|
||||
@ -1413,7 +1411,7 @@ static const struct dev_pm_ops intel_mid_dma_pm = {
|
||||
.runtime_idle = dma_runtime_idle,
|
||||
};
|
||||
|
||||
static struct pci_driver intel_mid_dma_pci = {
|
||||
static struct pci_driver intel_mid_dma_pci_driver = {
|
||||
.name = "Intel MID DMA",
|
||||
.id_table = intel_mid_dma_ids,
|
||||
.probe = intel_mid_dma_probe,
|
||||
@ -1431,13 +1429,13 @@ static int __init intel_mid_dma_init(void)
|
||||
{
|
||||
pr_debug("INFO_MDMA: LNW DMA Driver Version %s\n",
|
||||
INTEL_MID_DMA_DRIVER_VERSION);
|
||||
return pci_register_driver(&intel_mid_dma_pci);
|
||||
return pci_register_driver(&intel_mid_dma_pci_driver);
|
||||
}
|
||||
fs_initcall(intel_mid_dma_init);
|
||||
|
||||
static void __exit intel_mid_dma_exit(void)
|
||||
{
|
||||
pci_unregister_driver(&intel_mid_dma_pci);
|
||||
pci_unregister_driver(&intel_mid_dma_pci_driver);
|
||||
}
|
||||
module_exit(intel_mid_dma_exit);
|
||||
|
||||
|
@ -1,2 +1,2 @@
|
||||
obj-$(CONFIG_INTEL_IOATDMA) += ioatdma.o
|
||||
ioatdma-objs := pci.o dma.o dma_v2.o dma_v3.o dca.o
|
||||
ioatdma-y := pci.o dma.o dma_v2.o dma_v3.o dca.o
|
||||
|
@ -259,11 +259,6 @@ static void pdc_dostart(struct pch_dma_chan *pd_chan, struct pch_dma_desc* desc)
|
||||
return;
|
||||
}
|
||||
|
||||
channel_writel(pd_chan, DEV_ADDR, desc->regs.dev_addr);
|
||||
channel_writel(pd_chan, MEM_ADDR, desc->regs.mem_addr);
|
||||
channel_writel(pd_chan, SIZE, desc->regs.size);
|
||||
channel_writel(pd_chan, NEXT, desc->regs.next);
|
||||
|
||||
dev_dbg(chan2dev(&pd_chan->chan), "chan %d -> dev_addr: %x\n",
|
||||
pd_chan->chan.chan_id, desc->regs.dev_addr);
|
||||
dev_dbg(chan2dev(&pd_chan->chan), "chan %d -> mem_addr: %x\n",
|
||||
@ -273,10 +268,16 @@ static void pdc_dostart(struct pch_dma_chan *pd_chan, struct pch_dma_desc* desc)
|
||||
dev_dbg(chan2dev(&pd_chan->chan), "chan %d -> next: %x\n",
|
||||
pd_chan->chan.chan_id, desc->regs.next);
|
||||
|
||||
if (list_empty(&desc->tx_list))
|
||||
if (list_empty(&desc->tx_list)) {
|
||||
channel_writel(pd_chan, DEV_ADDR, desc->regs.dev_addr);
|
||||
channel_writel(pd_chan, MEM_ADDR, desc->regs.mem_addr);
|
||||
channel_writel(pd_chan, SIZE, desc->regs.size);
|
||||
channel_writel(pd_chan, NEXT, desc->regs.next);
|
||||
pdc_set_mode(&pd_chan->chan, DMA_CTL0_ONESHOT);
|
||||
else
|
||||
} else {
|
||||
channel_writel(pd_chan, NEXT, desc->txd.phys);
|
||||
pdc_set_mode(&pd_chan->chan, DMA_CTL0_SG);
|
||||
}
|
||||
|
||||
val = dma_readl(pd, CTL2);
|
||||
val |= 1 << (DMA_CTL2_START_SHIFT_BITS + pd_chan->chan.chan_id);
|
||||
|
@ -4449,9 +4449,8 @@ static int __devinit ppc440spe_adma_probe(struct platform_device *ofdev,
|
||||
|
||||
if (!request_mem_region(res.start, resource_size(&res),
|
||||
dev_driver_string(&ofdev->dev))) {
|
||||
dev_err(&ofdev->dev, "failed to request memory region "
|
||||
"(0x%016llx-0x%016llx)\n",
|
||||
(u64)res.start, (u64)res.end);
|
||||
dev_err(&ofdev->dev, "failed to request memory region %pR\n",
|
||||
&res);
|
||||
initcode = PPC_ADMA_INIT_MEMREG;
|
||||
ret = -EBUSY;
|
||||
goto out;
|
||||
|
Loading…
Reference in New Issue
Block a user