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usb: dwc2: gadget: Add DDMA chain pointers to dwc2_hsotg_ep structure
Add DMA descriptor members to the dwc2_hsotg_ep structure. Signed-off-by: Vahram Aharonyan <vahrama@synopsys.com> Signed-off-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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@ -172,6 +172,9 @@ struct dwc2_hsotg_req;
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* @periodic: Set if this is a periodic ep, such as Interrupt
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* @periodic: Set if this is a periodic ep, such as Interrupt
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* @isochronous: Set if this is a isochronous ep
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* @isochronous: Set if this is a isochronous ep
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* @send_zlp: Set if we need to send a zero-length packet.
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* @send_zlp: Set if we need to send a zero-length packet.
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* @desc_list_dma: The DMA address of descriptor chain currently in use.
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* @desc_list: Pointer to descriptor DMA chain head currently in use.
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* @desc_count: Count of entries within the DMA descriptor chain of EP.
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* @total_data: The total number of data bytes done.
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* @total_data: The total number of data bytes done.
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* @fifo_size: The size of the FIFO (for periodic IN endpoints)
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* @fifo_size: The size of the FIFO (for periodic IN endpoints)
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* @fifo_load: The amount of data loaded into the FIFO (periodic IN)
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* @fifo_load: The amount of data loaded into the FIFO (periodic IN)
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@ -219,6 +222,10 @@ struct dwc2_hsotg_ep {
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#define TARGET_FRAME_INITIAL 0xFFFFFFFF
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#define TARGET_FRAME_INITIAL 0xFFFFFFFF
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bool frame_overrun;
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bool frame_overrun;
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dma_addr_t desc_list_dma;
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struct dwc2_dma_desc *desc_list;
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u8 desc_count;
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char name[10];
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char name[10];
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};
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};
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@ -3077,6 +3077,18 @@ static int dwc2_hsotg_ep_enable(struct usb_ep *ep,
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dev_dbg(hsotg->dev, "%s: read DxEPCTL=0x%08x from 0x%08x\n",
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dev_dbg(hsotg->dev, "%s: read DxEPCTL=0x%08x from 0x%08x\n",
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__func__, epctrl, epctrl_reg);
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__func__, epctrl, epctrl_reg);
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/* Allocate DMA descriptor chain for non-ctrl endpoints */
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if (using_desc_dma(hsotg)) {
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hs_ep->desc_list = dma_alloc_coherent(hsotg->dev,
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MAX_DMA_DESC_NUM_GENERIC *
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sizeof(struct dwc2_dma_desc),
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&hs_ep->desc_list_dma, GFP_KERNEL);
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if (!hs_ep->desc_list) {
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ret = -ENOMEM;
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goto error2;
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}
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}
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spin_lock_irqsave(&hsotg->lock, flags);
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spin_lock_irqsave(&hsotg->lock, flags);
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epctrl &= ~(DXEPCTL_EPTYPE_MASK | DXEPCTL_MPS_MASK);
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epctrl &= ~(DXEPCTL_EPTYPE_MASK | DXEPCTL_MPS_MASK);
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@ -3160,7 +3172,7 @@ static int dwc2_hsotg_ep_enable(struct usb_ep *ep,
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dev_err(hsotg->dev,
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dev_err(hsotg->dev,
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"%s: No suitable fifo found\n", __func__);
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"%s: No suitable fifo found\n", __func__);
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ret = -ENOMEM;
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ret = -ENOMEM;
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goto error;
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goto error1;
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}
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}
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hsotg->fifo_map |= 1 << fifo_index;
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hsotg->fifo_map |= 1 << fifo_index;
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epctrl |= DXEPCTL_TXFNUM(fifo_index);
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epctrl |= DXEPCTL_TXFNUM(fifo_index);
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@ -3182,8 +3194,17 @@ static int dwc2_hsotg_ep_enable(struct usb_ep *ep,
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/* enable the endpoint interrupt */
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/* enable the endpoint interrupt */
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dwc2_hsotg_ctrl_epint(hsotg, index, dir_in, 1);
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dwc2_hsotg_ctrl_epint(hsotg, index, dir_in, 1);
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error:
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error1:
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spin_unlock_irqrestore(&hsotg->lock, flags);
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spin_unlock_irqrestore(&hsotg->lock, flags);
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error2:
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if (ret && using_desc_dma(hsotg) && hs_ep->desc_list) {
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dma_free_coherent(hsotg->dev, MAX_DMA_DESC_NUM_GENERIC *
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sizeof(struct dwc2_dma_desc),
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hs_ep->desc_list, hs_ep->desc_list_dma);
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hs_ep->desc_list = NULL;
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}
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return ret;
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return ret;
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}
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}
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@ -3208,6 +3229,14 @@ static int dwc2_hsotg_ep_disable(struct usb_ep *ep)
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return -EINVAL;
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return -EINVAL;
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}
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}
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/* Remove DMA memory allocated for non-control Endpoints */
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if (using_desc_dma(hsotg)) {
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dma_free_coherent(hsotg->dev, MAX_DMA_DESC_NUM_GENERIC *
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sizeof(struct dwc2_dma_desc),
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hs_ep->desc_list, hs_ep->desc_list_dma);
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hs_ep->desc_list = NULL;
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}
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epctrl_reg = dir_in ? DIEPCTL(index) : DOEPCTL(index);
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epctrl_reg = dir_in ? DIEPCTL(index) : DOEPCTL(index);
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spin_lock_irqsave(&hsotg->lock, flags);
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spin_lock_irqsave(&hsotg->lock, flags);
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