FEX-Emu/linux
1
0
Fork 0
mirror of https://github.com/FEX-Emu/linux.git synced 2025-02-14 00:13:53 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

mtd: nand: Prevent possible kernel lockup in nand_command()

Browse Source 
If a NAND device is not really present or pin muxes are not correctly
configured we can lock up the kernel waiting infinitely for NAND_STATUS
to be ready.

This can be easily reproduced on TI's DRA7-evm board by booting it
without NAND support in u-boot and disabling NAND pin muxes in the kernel.

Add timeout when waiting for NAND_CMD_RESET completion. As per ONFi v4.0
tRST can be upto 250ms for EZ-NAND and 5ms for raw NAND.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Tested-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
This commit is contained in:
Roger Quadros 2015-02-23 17:26:39 +02:00 committed by Brian Norris
parent 8cc7f33aad
commit 60c70d66cd
1 changed files with 23 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

27
drivers/mtd/nand/nand_base.c
View File

@ -565,6 +565,25 @@ void nand_wait_ready(struct mtd_info *mtd)
} }
EXPORT_SYMBOL_GPL(nand_wait_ready); EXPORT_SYMBOL_GPL(nand_wait_ready);
/**
* nand_wait_status_ready - [GENERIC] Wait for the ready status after commands.
* @mtd: MTD device structure
* @timeo: Timeout in ms
*
* Wait for status ready (i.e. command done) or timeout.
*/
static void nand_wait_status_ready(struct mtd_info *mtd, unsigned long timeo)
{
register struct nand_chip *chip = mtd->priv;
timeo = jiffies + msecs_to_jiffies(timeo);
do {
if ((chip->read_byte(mtd) & NAND_STATUS_READY))
break;
touch_softlockup_watchdog();
} while (time_before(jiffies, timeo));
};
/** /**
* nand_command - [DEFAULT] Send command to NAND device * nand_command - [DEFAULT] Send command to NAND device
* @mtd: MTD device structure * @mtd: MTD device structure
@ -643,8 +662,8 @@ static void nand_command(struct mtd_info *mtd, unsigned int command,
NAND_CTRL_CLE | NAND_CTRL_CHANGE); NAND_CTRL_CLE | NAND_CTRL_CHANGE);
chip->cmd_ctrl(mtd, chip->cmd_ctrl(mtd,
NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
while (!(chip->read_byte(mtd) & NAND_STATUS_READY)) /* EZ-NAND can take upto 250ms as per ONFi v4.0 */
; nand_wait_status_ready(mtd, 250);
return; return;
/* This applies to read commands */ /* This applies to read commands */
@ -740,8 +759,8 @@ static void nand_command_lp(struct mtd_info *mtd, unsigned int command,
NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE); NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
chip->cmd_ctrl(mtd, NAND_CMD_NONE, chip->cmd_ctrl(mtd, NAND_CMD_NONE,
NAND_NCE | NAND_CTRL_CHANGE); NAND_NCE | NAND_CTRL_CHANGE);
while (!(chip->read_byte(mtd) & NAND_STATUS_READY)) /* EZ-NAND can take upto 250ms as per ONFi v4.0 */
; nand_wait_status_ready(mtd, 250);
return; return;
case NAND_CMD_RNDOUT: case NAND_CMD_RNDOUT: