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drm/exynos: add generic check for plane state

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This patch adds generic check for plane state - display area dimensions,
so drivers can always assume that they get valid plane state to set.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
This commit is contained in:
Marek Szyprowski 2015-11-30 14:53:26 +01:00 committed by Inki Dae
parent fd2d2fc2db
commit 6178d3d1bb
3 changed files with 37 additions and 0 deletions
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3
drivers/gpu/drm/exynos/exynos_drm_drv.h
View File

@ -89,6 +89,9 @@ struct exynos_drm_plane {
struct drm_framebuffer *pending_fb; struct drm_framebuffer *pending_fb;
}; };
#define EXYNOS_DRM_PLANE_CAP_DOUBLE (1 << 0)
#define EXYNOS_DRM_PLANE_CAP_SCALE (1 << 1)
/* /*
* Exynos DRM plane configuration structure. * Exynos DRM plane configuration structure.
* *

31
drivers/gpu/drm/exynos/exynos_drm_plane.c
View File

@ -173,6 +173,36 @@ static struct drm_plane_funcs exynos_plane_funcs = {
.atomic_destroy_state = exynos_drm_plane_destroy_state, .atomic_destroy_state = exynos_drm_plane_destroy_state,
}; };
static int
exynos_drm_plane_check_size(const struct exynos_drm_plane_config *config,
struct exynos_drm_plane_state *state)
{
bool width_ok = false, height_ok = false;
if (config->capabilities & EXYNOS_DRM_PLANE_CAP_SCALE)
return 0;
if (state->src.w == state->crtc.w)
width_ok = true;
if (state->src.h == state->crtc.h)
height_ok = true;
if ((config->capabilities & EXYNOS_DRM_PLANE_CAP_DOUBLE) &&
state->h_ratio == (1 << 15))
width_ok = true;
if ((config->capabilities & EXYNOS_DRM_PLANE_CAP_DOUBLE) &&
state->v_ratio == (1 << 15))
height_ok = true;
if (width_ok & height_ok)
return 0;
DRM_DEBUG_KMS("scaling mode is not supported");
return -ENOTSUPP;
}
static int exynos_plane_atomic_check(struct drm_plane *plane, static int exynos_plane_atomic_check(struct drm_plane *plane,
struct drm_plane_state *state) struct drm_plane_state *state)
{ {
@ -187,6 +217,7 @@ static int exynos_plane_atomic_check(struct drm_plane *plane,
/* translate state into exynos_state */ /* translate state into exynos_state */
exynos_plane_mode_set(exynos_state); exynos_plane_mode_set(exynos_state);
ret = exynos_drm_plane_check_size(exynos_plane->config, exynos_state);
return ret; return ret;
} }

3
drivers/gpu/drm/exynos/exynos_mixer.c
View File

@ -117,16 +117,19 @@ static const struct exynos_drm_plane_config plane_configs[MIXER_WIN_NR] = {
.type = DRM_PLANE_TYPE_PRIMARY, .type = DRM_PLANE_TYPE_PRIMARY,
.pixel_formats = mixer_formats, .pixel_formats = mixer_formats,
.num_pixel_formats = ARRAY_SIZE(mixer_formats), .num_pixel_formats = ARRAY_SIZE(mixer_formats),
.capabilities = EXYNOS_DRM_PLANE_CAP_DOUBLE,
}, { }, {
.zpos = 1, .zpos = 1,
.type = DRM_PLANE_TYPE_CURSOR, .type = DRM_PLANE_TYPE_CURSOR,
.pixel_formats = mixer_formats, .pixel_formats = mixer_formats,
.num_pixel_formats = ARRAY_SIZE(mixer_formats), .num_pixel_formats = ARRAY_SIZE(mixer_formats),
.capabilities = EXYNOS_DRM_PLANE_CAP_DOUBLE,
}, { }, {
.zpos = 2, .zpos = 2,
.type = DRM_PLANE_TYPE_OVERLAY, .type = DRM_PLANE_TYPE_OVERLAY,
.pixel_formats = vp_formats, .pixel_formats = vp_formats,
.num_pixel_formats = ARRAY_SIZE(vp_formats), .num_pixel_formats = ARRAY_SIZE(vp_formats),
.capabilities = EXYNOS_DRM_PLANE_CAP_SCALE,
}, },
}; };