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firewire: ohci: remove unused dualbuffer IR code
This code was no longer used since 2.6.33, "firewire: ohci: always use
packet-per-buffer mode for isochronous reception" commit 090699c0. If
anybody needs this code in the future for special purposes, it can be
brought back in. But it must not be re-enabled by default; drivers
(kernelspace or userspace drivers) should only get this mode if they
explicitly request it.
Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de>
This commit is contained in:
Stefan Richter
parent
64582298b9
commit
6498ba04ae
@ -72,20 +72,6 @@ struct descriptor {
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__le16 transfer_status;
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} __attribute__((aligned(16)));
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struct db_descriptor {
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__le16 first_size;
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__le16 control;
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__le16 second_req_count;
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__le16 first_req_count;
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__le32 branch_address;
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__le16 second_res_count;
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__le16 first_res_count;
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__le32 reserved0;
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__le32 first_buffer;
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__le32 second_buffer;
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__le32 reserved1;
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} __attribute__((aligned(16)));
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#define CONTROL_SET(regs) (regs)
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#define CONTROL_CLEAR(regs) ((regs) + 4)
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#define COMMAND_PTR(regs) ((regs) + 12)
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@ -187,7 +173,6 @@ struct fw_ohci {
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int generation;
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int request_generation; /* for timestamping incoming requests */
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bool use_dualbuffer;
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bool old_uninorth;
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bool bus_reset_packet_quirk;
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bool iso_cycle_timer_quirk;
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@ -1863,52 +1848,6 @@ static void copy_iso_headers(struct iso_context *ctx, void *p)
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ctx->header_length += ctx->base.header_size;
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}
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static int handle_ir_dualbuffer_packet(struct context *context,
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struct descriptor *d,
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struct descriptor *last)
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{
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struct iso_context *ctx =
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container_of(context, struct iso_context, context);
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struct db_descriptor *db = (struct db_descriptor *) d;
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__le32 *ir_header;
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size_t header_length;
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void *p, *end;
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if (db->first_res_count != 0 && db->second_res_count != 0) {
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if (ctx->excess_bytes <= le16_to_cpu(db->second_req_count)) {
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/* This descriptor isn't done yet, stop iteration. */
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return 0;
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}
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ctx->excess_bytes -= le16_to_cpu(db->second_req_count);
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}
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header_length = le16_to_cpu(db->first_req_count) -
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le16_to_cpu(db->first_res_count);
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p = db + 1;
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end = p + header_length;
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while (p < end) {
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copy_iso_headers(ctx, p);
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ctx->excess_bytes +=
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(le32_to_cpu(*(__le32 *)(p + 4)) >> 16) & 0xffff;
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p += max(ctx->base.header_size, (size_t)8);
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}
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ctx->excess_bytes -= le16_to_cpu(db->second_req_count) -
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le16_to_cpu(db->second_res_count);
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if (le16_to_cpu(db->control) & DESCRIPTOR_IRQ_ALWAYS) {
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ir_header = (__le32 *) (db + 1);
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ctx->base.callback(&ctx->base,
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le32_to_cpu(ir_header[0]) & 0xffff,
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ctx->header_length, ctx->header,
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ctx->base.callback_data);
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ctx->header_length = 0;
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}
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return 1;
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}
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static int handle_ir_packet_per_buffer(struct context *context,
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struct descriptor *d,
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struct descriptor *last)
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@ -1995,10 +1934,7 @@ static struct fw_iso_context *ohci_allocate_iso_context(struct fw_card *card,
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channels = &ohci->ir_context_channels;
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mask = &ohci->ir_context_mask;
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list = ohci->ir_context_list;
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if (ohci->use_dualbuffer)
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callback = handle_ir_dualbuffer_packet;
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else
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callback = handle_ir_packet_per_buffer;
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callback = handle_ir_packet_per_buffer;
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}
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spin_lock_irqsave(&ohci->lock, flags);
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@ -2061,8 +1997,6 @@ static int ohci_start_iso(struct fw_iso_context *base,
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} else {
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index = ctx - ohci->ir_context_list;
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control = IR_CONTEXT_ISOCH_HEADER;
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if (ohci->use_dualbuffer)
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control |= IR_CONTEXT_DUAL_BUFFER_MODE;
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match = (tags << 28) | (sync << 8) | ctx->base.channel;
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if (cycle >= 0) {
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match |= (cycle & 0x07fff) << 12;
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@ -2223,92 +2157,6 @@ static int ohci_queue_iso_transmit(struct fw_iso_context *base,
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return 0;
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}
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static int ohci_queue_iso_receive_dualbuffer(struct fw_iso_context *base,
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struct fw_iso_packet *packet,
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struct fw_iso_buffer *buffer,
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unsigned long payload)
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{
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struct iso_context *ctx = container_of(base, struct iso_context, base);
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struct db_descriptor *db = NULL;
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struct descriptor *d;
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struct fw_iso_packet *p;
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dma_addr_t d_bus, page_bus;
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u32 z, header_z, length, rest;
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int page, offset, packet_count, header_size;
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/*
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* FIXME: Cycle lost behavior should be configurable: lose
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* packet, retransmit or terminate..
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*/
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p = packet;
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z = 2;
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/*
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* The OHCI controller puts the isochronous header and trailer in the
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* buffer, so we need at least 8 bytes.
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*/
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packet_count = p->header_length / ctx->base.header_size;
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header_size = packet_count * max(ctx->base.header_size, (size_t)8);
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/* Get header size in number of descriptors. */
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header_z = DIV_ROUND_UP(header_size, sizeof(*d));
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page = payload >> PAGE_SHIFT;
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offset = payload & ~PAGE_MASK;
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rest = p->payload_length;
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/*
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* The controllers I've tested have not worked correctly when
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* second_req_count is zero. Rather than do something we know won't
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* work, return an error
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*/
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if (rest == 0)
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return -EINVAL;
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while (rest > 0) {
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d = context_get_descriptors(&ctx->context,
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z + header_z, &d_bus);
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if (d == NULL)
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return -ENOMEM;
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db = (struct db_descriptor *) d;
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db->control = cpu_to_le16(DESCRIPTOR_STATUS |
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DESCRIPTOR_BRANCH_ALWAYS);
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db->first_size =
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cpu_to_le16(max(ctx->base.header_size, (size_t)8));
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if (p->skip && rest == p->payload_length) {
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db->control |= cpu_to_le16(DESCRIPTOR_WAIT);
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db->first_req_count = db->first_size;
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} else {
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db->first_req_count = cpu_to_le16(header_size);
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}
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db->first_res_count = db->first_req_count;
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db->first_buffer = cpu_to_le32(d_bus + sizeof(*db));
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if (p->skip && rest == p->payload_length)
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length = 4;
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else if (offset + rest < PAGE_SIZE)
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length = rest;
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else
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length = PAGE_SIZE - offset;
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db->second_req_count = cpu_to_le16(length);
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db->second_res_count = db->second_req_count;
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page_bus = page_private(buffer->pages[page]);
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db->second_buffer = cpu_to_le32(page_bus + offset);
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if (p->interrupt && length == rest)
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db->control |= cpu_to_le16(DESCRIPTOR_IRQ_ALWAYS);
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context_append(&ctx->context, d, z, header_z);
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offset = (offset + length) & ~PAGE_MASK;
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rest -= length;
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if (offset == 0)
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page++;
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}
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return 0;
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}
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static int ohci_queue_iso_receive_packet_per_buffer(struct fw_iso_context *base,
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struct fw_iso_packet *packet,
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struct fw_iso_buffer *buffer,
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@ -2399,9 +2247,6 @@ static int ohci_queue_iso(struct fw_iso_context *base,
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spin_lock_irqsave(&ctx->context.ohci->lock, flags);
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if (base->type == FW_ISO_CONTEXT_TRANSMIT)
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ret = ohci_queue_iso_transmit(base, packet, buffer, payload);
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else if (ctx->context.ohci->use_dualbuffer)
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ret = ohci_queue_iso_receive_dualbuffer(base, packet,
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buffer, payload);
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else
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ret = ohci_queue_iso_receive_packet_per_buffer(base, packet,
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buffer, payload);
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@ -2456,10 +2301,6 @@ static void ohci_pmac_off(struct pci_dev *dev)
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#define ohci_pmac_off(dev)
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#endif /* CONFIG_PPC_PMAC */
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#define PCI_VENDOR_ID_AGERE PCI_VENDOR_ID_ATT
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#define PCI_DEVICE_ID_AGERE_FW643 0x5901
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#define PCI_DEVICE_ID_TI_TSB43AB23 0x8024
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static int __devinit pci_probe(struct pci_dev *dev,
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const struct pci_device_id *ent)
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{
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@ -2508,29 +2349,6 @@ static int __devinit pci_probe(struct pci_dev *dev,
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}
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version = reg_read(ohci, OHCI1394_Version) & 0x00ff00ff;
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#if 0
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/* FIXME: make it a context option or remove dual-buffer mode */
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ohci->use_dualbuffer = version >= OHCI_VERSION_1_1;
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#endif
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/* dual-buffer mode is broken if more than one IR context is active */
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if (dev->vendor == PCI_VENDOR_ID_AGERE &&
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dev->device == PCI_DEVICE_ID_AGERE_FW643)
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ohci->use_dualbuffer = false;
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/* dual-buffer mode is broken */
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if (dev->vendor == PCI_VENDOR_ID_RICOH &&
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dev->device == PCI_DEVICE_ID_RICOH_R5C832)
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ohci->use_dualbuffer = false;
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/* x86-32 currently doesn't use highmem for dma_alloc_coherent */
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#if !defined(CONFIG_X86_32)
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/* dual-buffer mode is broken with descriptor addresses above 2G */
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if (dev->vendor == PCI_VENDOR_ID_TI &&
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(dev->device == PCI_DEVICE_ID_TI_TSB43AB22 ||
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dev->device == PCI_DEVICE_ID_TI_TSB43AB23))
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ohci->use_dualbuffer = false;
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#endif
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#if defined(CONFIG_PPC_PMAC) && defined(CONFIG_PPC32)
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ohci->old_uninorth = dev->vendor == PCI_VENDOR_ID_APPLE &&
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@ -770,7 +770,6 @@
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#define PCI_VENDOR_ID_TI 0x104c
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#define PCI_DEVICE_ID_TI_TVP4020 0x3d07
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#define PCI_DEVICE_ID_TI_4450 0x8011
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#define PCI_DEVICE_ID_TI_TSB43AB22 0x8023
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#define PCI_DEVICE_ID_TI_XX21_XX11 0x8031
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#define PCI_DEVICE_ID_TI_XX21_XX11_FM 0x8033
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#define PCI_DEVICE_ID_TI_XX21_XX11_SD 0x8034
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