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crypto: arm - move ARM specific Kconfig definitions to a dedicated file
This moves all Kconfig symbols defined in crypto/Kconfig that depend on CONFIG_ARM to a dedicated Kconfig file in arch/arm/crypto, which is where the code that implements those features resides as well. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This commit is contained in:
Ard Biesheuvel
Herbert Xu
parent
1eb8a1b340
commit
652ccae5cc
@ -2167,6 +2167,9 @@ source "arch/arm/Kconfig.debug"
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source "security/Kconfig"
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source "crypto/Kconfig"
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if CRYPTO
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source "arch/arm/crypto/Kconfig"
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endif
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source "lib/Kconfig"
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85
arch/arm/crypto/Kconfig
Normal file
85
arch/arm/crypto/Kconfig
Normal file
@ -0,0 +1,85 @@
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menuconfig ARM_CRYPTO
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bool "ARM Accelerated Cryptographic Algorithms"
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depends on ARM
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help
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Say Y here to choose from a selection of cryptographic algorithms
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implemented using ARM specific CPU features or instructions.
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if ARM_CRYPTO
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config CRYPTO_SHA1_ARM
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tristate "SHA1 digest algorithm (ARM-asm)"
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select CRYPTO_SHA1
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select CRYPTO_HASH
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help
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SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2) implemented
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using optimized ARM assembler.
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config CRYPTO_SHA1_ARM_NEON
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tristate "SHA1 digest algorithm (ARM NEON)"
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depends on KERNEL_MODE_NEON
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select CRYPTO_SHA1_ARM
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select CRYPTO_SHA1
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select CRYPTO_HASH
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help
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SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2) implemented
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using optimized ARM NEON assembly, when NEON instructions are
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available.
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config CRYPTO_SHA512_ARM_NEON
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tristate "SHA384 and SHA512 digest algorithm (ARM NEON)"
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depends on KERNEL_MODE_NEON
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select CRYPTO_SHA512
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select CRYPTO_HASH
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help
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SHA-512 secure hash standard (DFIPS 180-2) implemented
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using ARM NEON instructions, when available.
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This version of SHA implements a 512 bit hash with 256 bits of
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security against collision attacks.
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This code also includes SHA-384, a 384 bit hash with 192 bits
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of security against collision attacks.
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config CRYPTO_AES_ARM
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tristate "AES cipher algorithms (ARM-asm)"
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depends on ARM
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select CRYPTO_ALGAPI
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select CRYPTO_AES
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help
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Use optimized AES assembler routines for ARM platforms.
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AES cipher algorithms (FIPS-197). AES uses the Rijndael
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algorithm.
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Rijndael appears to be consistently a very good performer in
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both hardware and software across a wide range of computing
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environments regardless of its use in feedback or non-feedback
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modes. Its key setup time is excellent, and its key agility is
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good. Rijndael's very low memory requirements make it very well
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suited for restricted-space environments, in which it also
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demonstrates excellent performance. Rijndael's operations are
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among the easiest to defend against power and timing attacks.
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The AES specifies three key sizes: 128, 192 and 256 bits
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See <http://csrc.nist.gov/encryption/aes/> for more information.
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config CRYPTO_AES_ARM_BS
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tristate "Bit sliced AES using NEON instructions"
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depends on KERNEL_MODE_NEON
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select CRYPTO_ALGAPI
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select CRYPTO_AES_ARM
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select CRYPTO_ABLK_HELPER
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help
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Use a faster and more secure NEON based implementation of AES in CBC,
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CTR and XTS modes
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Bit sliced AES gives around 45% speedup on Cortex-A15 for CTR mode
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and for XTS mode encryption, CBC and XTS mode decryption speedup is
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around 25%. (CBC encryption speed is not affected by this driver.)
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This implementation does not rely on any lookup tables so it is
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believed to be invulnerable to cache timing attacks.
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endif
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@ -572,26 +572,6 @@ config CRYPTO_SHA1_SPARC64
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SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2) implemented
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using sparc64 crypto instructions, when available.
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config CRYPTO_SHA1_ARM
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tristate "SHA1 digest algorithm (ARM-asm)"
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depends on ARM
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select CRYPTO_SHA1
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select CRYPTO_HASH
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help
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SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2) implemented
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using optimized ARM assembler.
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config CRYPTO_SHA1_ARM_NEON
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tristate "SHA1 digest algorithm (ARM NEON)"
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depends on ARM && KERNEL_MODE_NEON
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select CRYPTO_SHA1_ARM
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select CRYPTO_SHA1
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select CRYPTO_HASH
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help
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SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2) implemented
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using optimized ARM NEON assembly, when NEON instructions are
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available.
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config CRYPTO_SHA1_PPC
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tristate "SHA1 digest algorithm (powerpc)"
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depends on PPC
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@ -691,21 +671,6 @@ config CRYPTO_SHA512_SPARC64
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SHA-512 secure hash standard (DFIPS 180-2) implemented
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using sparc64 crypto instructions, when available.
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config CRYPTO_SHA512_ARM_NEON
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tristate "SHA384 and SHA512 digest algorithm (ARM NEON)"
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depends on ARM && KERNEL_MODE_NEON
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select CRYPTO_SHA512
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select CRYPTO_HASH
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help
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SHA-512 secure hash standard (DFIPS 180-2) implemented
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using ARM NEON instructions, when available.
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This version of SHA implements a 512 bit hash with 256 bits of
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security against collision attacks.
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This code also includes SHA-384, a 384 bit hash with 192 bits
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of security against collision attacks.
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config CRYPTO_TGR192
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tristate "Tiger digest algorithms"
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select CRYPTO_HASH
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@ -868,46 +833,6 @@ config CRYPTO_AES_SPARC64
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for some popular block cipher mode is supported too, including
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ECB and CBC.
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config CRYPTO_AES_ARM
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tristate "AES cipher algorithms (ARM-asm)"
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depends on ARM
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select CRYPTO_ALGAPI
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select CRYPTO_AES
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help
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Use optimized AES assembler routines for ARM platforms.
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AES cipher algorithms (FIPS-197). AES uses the Rijndael
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algorithm.
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Rijndael appears to be consistently a very good performer in
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both hardware and software across a wide range of computing
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environments regardless of its use in feedback or non-feedback
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modes. Its key setup time is excellent, and its key agility is
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good. Rijndael's very low memory requirements make it very well
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suited for restricted-space environments, in which it also
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demonstrates excellent performance. Rijndael's operations are
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among the easiest to defend against power and timing attacks.
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The AES specifies three key sizes: 128, 192 and 256 bits
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See <http://csrc.nist.gov/encryption/aes/> for more information.
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config CRYPTO_AES_ARM_BS
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tristate "Bit sliced AES using NEON instructions"
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depends on ARM && KERNEL_MODE_NEON
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select CRYPTO_ALGAPI
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select CRYPTO_AES_ARM
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select CRYPTO_ABLK_HELPER
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help
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Use a faster and more secure NEON based implementation of AES in CBC,
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CTR and XTS modes
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Bit sliced AES gives around 45% speedup on Cortex-A15 for CTR mode
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and for XTS mode encryption, CBC and XTS mode decryption speedup is
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around 25%. (CBC encryption speed is not affected by this driver.)
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This implementation does not rely on any lookup tables so it is
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believed to be invulnerable to cache timing attacks.
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config CRYPTO_AES_PPC_SPE
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tristate "AES cipher algorithms (PPC SPE)"
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depends on PPC && SPE
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