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Blackfin: bf51x: fix alternative portmux options

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The BF51x's alternative portmux Kconfig options were copy & pasted from
the BF52x, but never tweaked to reflect it.  So drop the old options as
they were never used (and were simply wrong), and add the BF51x specific
pieces to the Kconfig and header.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This commit is contained in:
Mike Frysinger 2011-06-29 16:29:41 -04:00
parent fdfb0becea
commit 65cd3b5362
2 changed files with 88 additions and 46 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

84
arch/blackfin/mach-bf518/Kconfig
View File

@ -11,55 +11,75 @@ menu "BF518 Specific Configuration"
comment "Alternative Multiplexing Scheme" comment "Alternative Multiplexing Scheme"
choice choice
prompt "SPORT0" prompt "PWM Channel Pins"
default BF518_SPORT0_PORTG default BF518_PWM_ALL_PORTF
help help
Select PORT used for SPORT0. See Hardware Reference Manual Select pins used for the PWM channels:
PWM_AH PWM_AL PWM_BH PWM_BL PWM_CH PWM_CL
config BF518_SPORT0_PORTF See the Hardware Reference Manual for more details.
bool "PORT F"
help
PORT F
config BF518_SPORT0_PORTG config BF518_PWM_ALL_PORTF
bool "PORT G" bool "PF1 - PF6"
help help
PORT G PF{1,2,3,4,5,6} <-> PWM_{AH,AL,BH,BL,CH,CL}
config BF518_PWM_PORTF_PORTG
bool "PF11 - PF14 / PG1 - PG2"
help
PF{11,12,13,14} <-> PWM_{AH,AL,BH,BL}
PG{1,2} <-> PWM_{CH,CL}
endchoice endchoice
choice choice
prompt "SPORT0 TSCLK Location" prompt "PWM Sync Pin"
depends on BF518_SPORT0_PORTG default BF518_PWM_SYNC_PF7
default BF518_SPORT0_TSCLK_PG10
help help
Select PIN used for SPORT0_TSCLK. See Hardware Reference Manual Select the pin used for PWM_SYNC.
config BF518_SPORT0_TSCLK_PG10 See the Hardware Reference Manual for more details.
bool "PORT PG10"
help
PORT PG10
config BF518_SPORT0_TSCLK_PG14 config BF518_PWM_SYNC_PF7
bool "PORT PG14" bool "PF7"
help config BF518_PWM_SYNC_PF15
PORT PG14 bool "PF15"
endchoice endchoice
choice choice
prompt "UART1" prompt "PWM Trip B Pin"
default BF518_UART1_PORTF default BF518_PWM_TRIPB_PG10
help help
Select PORT used for UART1. See Hardware Reference Manual Select the pin used for PWM_TRIPB.
config BF518_UART1_PORTF See the Hardware Reference Manual for more details.
bool "PORT F"
help
PORT F
config BF518_UART1_PORTG config BF518_PWM_TRIPB_PG10
bool "PORT G" bool "PG10"
config BF518_PWM_TRIPB_PG14
bool "PG14"
endchoice
choice
prompt "PPI / Timer Pins"
default BF518_PPI_TMR_PG5
help help
PORT G Select pins used for PPI/Timer:
PPICLK PPIFS1 PPIFS2
TMRCLK TMR0 TMR1
See the Hardware Reference Manual for more details.
config BF518_PPI_TMR_PG5
bool "PG5 - PG7"
help
PG{5,6,7} <-> {PPICLK/TMRCLK,TMR0/PPIFS1,TMR1/PPIFS2}
config BF518_PPI_TMR_PG12
bool "PG12 - PG14"
help
PG{12,13,14} <-> {PPICLK/TMRCLK,TMR0/PPIFS1,TMR1/PPIFS2}
endchoice endchoice
comment "Hysteresis/Schmitt Trigger Control" comment "Hysteresis/Schmitt Trigger Control"

50
arch/blackfin/mach-bf518/include/mach/portmux.h
View File

@ -81,9 +81,15 @@
#define P_PPI0_D14 (P_DEFINED | P_IDENT(GPIO_PF14) | P_FUNCT(1)) #define P_PPI0_D14 (P_DEFINED | P_IDENT(GPIO_PF14) | P_FUNCT(1))
#define P_PPI0_D15 (P_DEFINED | P_IDENT(GPIO_PF15) | P_FUNCT(1)) #define P_PPI0_D15 (P_DEFINED | P_IDENT(GPIO_PF15) | P_FUNCT(1))
#ifndef CONFIG_BF518_PPI_TMR_PG12
#define P_PPI0_CLK (P_DEFINED | P_IDENT(GPIO_PG5) | P_FUNCT(1))
#define P_PPI0_FS1 (P_DEFINED | P_IDENT(GPIO_PG6) | P_FUNCT(1))
#define P_PPI0_FS2 (P_DEFINED | P_IDENT(GPIO_PG7) | P_FUNCT(1))
#else
#define P_PPI0_CLK (P_DEFINED | P_IDENT(GPIO_PG12) | P_FUNCT(1)) #define P_PPI0_CLK (P_DEFINED | P_IDENT(GPIO_PG12) | P_FUNCT(1))
#define P_PPI0_FS1 (P_DEFINED | P_IDENT(GPIO_PG13) | P_FUNCT(1)) #define P_PPI0_FS1 (P_DEFINED | P_IDENT(GPIO_PG13) | P_FUNCT(1))
#define P_PPI0_FS2 (P_DEFINED | P_IDENT(GPIO_PG14) | P_FUNCT(1)) #define P_PPI0_FS2 (P_DEFINED | P_IDENT(GPIO_PG14) | P_FUNCT(1))
#endif
#define P_PPI0_FS3 (P_DEFINED | P_IDENT(GPIO_PG15) | P_FUNCT(1)) #define P_PPI0_FS3 (P_DEFINED | P_IDENT(GPIO_PG15) | P_FUNCT(1))
/* SPI Port Mux */ /* SPI Port Mux */
@ -139,9 +145,15 @@
#define P_UART1_RX (P_DEFINED | P_IDENT(GPIO_PH7) | P_FUNCT(1)) #define P_UART1_RX (P_DEFINED | P_IDENT(GPIO_PH7) | P_FUNCT(1))
/* Timer */ /* Timer */
#ifndef CONFIG_BF518_PPI_TMR_PG12
#define P_TMRCLK (P_DEFINED | P_IDENT(GPIO_PG5) | P_FUNCT(2)) #define P_TMRCLK (P_DEFINED | P_IDENT(GPIO_PG5) | P_FUNCT(2))
#define P_TMR0 (P_DEFINED | P_IDENT(GPIO_PG6) | P_FUNCT(2)) #define P_TMR0 (P_DEFINED | P_IDENT(GPIO_PG6) | P_FUNCT(2))
#define P_TMR1 (P_DEFINED | P_IDENT(GPIO_PG7) | P_FUNCT(2)) #define P_TMR1 (P_DEFINED | P_IDENT(GPIO_PG7) | P_FUNCT(2))
#else
#define P_TMRCLK (P_DEFINED | P_IDENT(GPIO_PG12) | P_FUNCT(2))
#define P_TMR0 (P_DEFINED | P_IDENT(GPIO_PG13) | P_FUNCT(2))
#define P_TMR1 (P_DEFINED | P_IDENT(GPIO_PG14) | P_FUNCT(2))
#endif
#define P_TMR2 (P_DEFINED | P_IDENT(GPIO_PF9) | P_FUNCT(2)) #define P_TMR2 (P_DEFINED | P_IDENT(GPIO_PF9) | P_FUNCT(2))
#define P_TMR3 (P_DEFINED | P_IDENT(GPIO_PF10) | P_FUNCT(2)) #define P_TMR3 (P_DEFINED | P_IDENT(GPIO_PF10) | P_FUNCT(2))
#define P_TMR4 (P_DEFINED | P_IDENT(GPIO_PG9) | P_FUNCT(2)) #define P_TMR4 (P_DEFINED | P_IDENT(GPIO_PG9) | P_FUNCT(2))
@ -158,23 +170,33 @@
#define P_TWI0_SDA (P_DONTCARE) #define P_TWI0_SDA (P_DONTCARE)
/* PWM */ /* PWM */
#define P_PWM0_AH (P_DEFINED | P_IDENT(GPIO_PF1) | P_FUNCT(2)) #ifndef CONFIG_BF518_PWM_PORTF_PORTG
#define P_PWM0_AL (P_DEFINED | P_IDENT(GPIO_PF2) | P_FUNCT(2)) #define P_PWM_AH (P_DEFINED | P_IDENT(GPIO_PF1) | P_FUNCT(2))
#define P_PWM0_BH (P_DEFINED | P_IDENT(GPIO_PF3) | P_FUNCT(2)) #define P_PWM_AL (P_DEFINED | P_IDENT(GPIO_PF2) | P_FUNCT(2))
#define P_PWM0_BL (P_DEFINED | P_IDENT(GPIO_PF4) | P_FUNCT(2)) #define P_PWM_BH (P_DEFINED | P_IDENT(GPIO_PF3) | P_FUNCT(2))
#define P_PWM0_CH (P_DEFINED | P_IDENT(GPIO_PF5) | P_FUNCT(2)) #define P_PWM_BL (P_DEFINED | P_IDENT(GPIO_PF4) | P_FUNCT(2))
#define P_PWM0_CL (P_DEFINED | P_IDENT(GPIO_PF6) | P_FUNCT(2)) #define P_PWM_CH (P_DEFINED | P_IDENT(GPIO_PF5) | P_FUNCT(2))
#define P_PWM0_SYNC (P_DEFINED | P_IDENT(GPIO_PF7) | P_FUNCT(2)) #define P_PWM_CL (P_DEFINED | P_IDENT(GPIO_PF6) | P_FUNCT(2))
#else
#define P_PWM_AH (P_DEFINED | P_IDENT(GPIO_PF11) | P_FUNCT(2))
#define P_PWM_AL (P_DEFINED | P_IDENT(GPIO_PF12) | P_FUNCT(2))
#define P_PWM_BH (P_DEFINED | P_IDENT(GPIO_PF13) | P_FUNCT(2))
#define P_PWM_BL (P_DEFINED | P_IDENT(GPIO_PF14) | P_FUNCT(2))
#define P_PWM_CH (P_DEFINED | P_IDENT(GPIO_PG1) | P_FUNCT(2))
#define P_PWM_CL (P_DEFINED | P_IDENT(GPIO_PG2) | P_FUNCT(2))
#endif
#define P_PWM1_AH (P_DEFINED | P_IDENT(GPIO_PF11) | P_FUNCT(2)) #ifndef CONFIG_BF518_PWM_SYNC_PF15
#define P_PWM1_AL (P_DEFINED | P_IDENT(GPIO_PF12) | P_FUNCT(2)) #define P_PWM_SYNC (P_DEFINED | P_IDENT(GPIO_PF7) | P_FUNCT(2))
#define P_PWM1_BH (P_DEFINED | P_IDENT(GPIO_PF13) | P_FUNCT(2)) #else
#define P_PWM1_BL (P_DEFINED | P_IDENT(GPIO_PF14) | P_FUNCT(2)) #define P_PWM_SYNC (P_DEFINED | P_IDENT(GPIO_PF15) | P_FUNCT(2))
#define P_PWM1_CH (P_DEFINED | P_IDENT(GPIO_PG1) | P_FUNCT(2)) #endif
#define P_PWM1_CL (P_DEFINED | P_IDENT(GPIO_PG2) | P_FUNCT(2))
#define P_PWM1_SYNC (P_DEFINED | P_IDENT(GPIO_PF15) | P_FUNCT(2))
#ifndef CONFIG_BF518_PWM_TRIPB_PG14
#define P_PWM_TRIPB (P_DEFINED | P_IDENT(GPIO_PG10) | P_FUNCT(2))
#else
#define P_PWM_TRIPB (P_DEFINED | P_IDENT(GPIO_PG14) | P_FUNCT(2)) #define P_PWM_TRIPB (P_DEFINED | P_IDENT(GPIO_PG14) | P_FUNCT(2))
#endif
/* RSI */ /* RSI */
#define P_RSI_DATA0 (P_DEFINED | P_IDENT(GPIO_PG3) | P_FUNCT(1)) #define P_RSI_DATA0 (P_DEFINED | P_IDENT(GPIO_PG3) | P_FUNCT(1))