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Blackfin: bf51x: fix alternative portmux options
The BF51x's alternative portmux Kconfig options were copy & pasted from the BF52x, but never tweaked to reflect it. So drop the old options as they were never used (and were simply wrong), and add the BF51x specific pieces to the Kconfig and header. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This commit is contained in:
Mike Frysinger
parent
fdfb0becea
commit
65cd3b5362
@ -11,55 +11,75 @@ menu "BF518 Specific Configuration"
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comment "Alternative Multiplexing Scheme"
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choice
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prompt "SPORT0"
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default BF518_SPORT0_PORTG
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prompt "PWM Channel Pins"
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default BF518_PWM_ALL_PORTF
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help
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Select PORT used for SPORT0. See Hardware Reference Manual
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Select pins used for the PWM channels:
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PWM_AH PWM_AL PWM_BH PWM_BL PWM_CH PWM_CL
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config BF518_SPORT0_PORTF
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bool "PORT F"
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help
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PORT F
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See the Hardware Reference Manual for more details.
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config BF518_SPORT0_PORTG
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bool "PORT G"
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config BF518_PWM_ALL_PORTF
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bool "PF1 - PF6"
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help
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PORT G
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PF{1,2,3,4,5,6} <-> PWM_{AH,AL,BH,BL,CH,CL}
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config BF518_PWM_PORTF_PORTG
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bool "PF11 - PF14 / PG1 - PG2"
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help
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PF{11,12,13,14} <-> PWM_{AH,AL,BH,BL}
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PG{1,2} <-> PWM_{CH,CL}
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endchoice
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choice
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prompt "SPORT0 TSCLK Location"
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depends on BF518_SPORT0_PORTG
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default BF518_SPORT0_TSCLK_PG10
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prompt "PWM Sync Pin"
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default BF518_PWM_SYNC_PF7
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help
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Select PIN used for SPORT0_TSCLK. See Hardware Reference Manual
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Select the pin used for PWM_SYNC.
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config BF518_SPORT0_TSCLK_PG10
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bool "PORT PG10"
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help
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PORT PG10
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See the Hardware Reference Manual for more details.
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config BF518_SPORT0_TSCLK_PG14
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bool "PORT PG14"
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help
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PORT PG14
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config BF518_PWM_SYNC_PF7
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bool "PF7"
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config BF518_PWM_SYNC_PF15
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bool "PF15"
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endchoice
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choice
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prompt "UART1"
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default BF518_UART1_PORTF
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prompt "PWM Trip B Pin"
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default BF518_PWM_TRIPB_PG10
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help
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Select PORT used for UART1. See Hardware Reference Manual
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Select the pin used for PWM_TRIPB.
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config BF518_UART1_PORTF
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bool "PORT F"
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help
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PORT F
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See the Hardware Reference Manual for more details.
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config BF518_UART1_PORTG
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bool "PORT G"
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config BF518_PWM_TRIPB_PG10
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bool "PG10"
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config BF518_PWM_TRIPB_PG14
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bool "PG14"
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endchoice
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choice
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prompt "PPI / Timer Pins"
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default BF518_PPI_TMR_PG5
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help
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PORT G
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Select pins used for PPI/Timer:
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PPICLK PPIFS1 PPIFS2
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TMRCLK TMR0 TMR1
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See the Hardware Reference Manual for more details.
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config BF518_PPI_TMR_PG5
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bool "PG5 - PG7"
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help
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PG{5,6,7} <-> {PPICLK/TMRCLK,TMR0/PPIFS1,TMR1/PPIFS2}
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config BF518_PPI_TMR_PG12
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bool "PG12 - PG14"
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help
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PG{12,13,14} <-> {PPICLK/TMRCLK,TMR0/PPIFS1,TMR1/PPIFS2}
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endchoice
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comment "Hysteresis/Schmitt Trigger Control"
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@ -81,9 +81,15 @@
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#define P_PPI0_D14 (P_DEFINED | P_IDENT(GPIO_PF14) | P_FUNCT(1))
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#define P_PPI0_D15 (P_DEFINED | P_IDENT(GPIO_PF15) | P_FUNCT(1))
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#ifndef CONFIG_BF518_PPI_TMR_PG12
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#define P_PPI0_CLK (P_DEFINED | P_IDENT(GPIO_PG5) | P_FUNCT(1))
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#define P_PPI0_FS1 (P_DEFINED | P_IDENT(GPIO_PG6) | P_FUNCT(1))
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#define P_PPI0_FS2 (P_DEFINED | P_IDENT(GPIO_PG7) | P_FUNCT(1))
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#else
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#define P_PPI0_CLK (P_DEFINED | P_IDENT(GPIO_PG12) | P_FUNCT(1))
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#define P_PPI0_FS1 (P_DEFINED | P_IDENT(GPIO_PG13) | P_FUNCT(1))
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#define P_PPI0_FS2 (P_DEFINED | P_IDENT(GPIO_PG14) | P_FUNCT(1))
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#endif
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#define P_PPI0_FS3 (P_DEFINED | P_IDENT(GPIO_PG15) | P_FUNCT(1))
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/* SPI Port Mux */
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@ -139,9 +145,15 @@
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#define P_UART1_RX (P_DEFINED | P_IDENT(GPIO_PH7) | P_FUNCT(1))
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/* Timer */
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#ifndef CONFIG_BF518_PPI_TMR_PG12
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#define P_TMRCLK (P_DEFINED | P_IDENT(GPIO_PG5) | P_FUNCT(2))
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#define P_TMR0 (P_DEFINED | P_IDENT(GPIO_PG6) | P_FUNCT(2))
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#define P_TMR1 (P_DEFINED | P_IDENT(GPIO_PG7) | P_FUNCT(2))
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#else
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#define P_TMRCLK (P_DEFINED | P_IDENT(GPIO_PG12) | P_FUNCT(2))
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#define P_TMR0 (P_DEFINED | P_IDENT(GPIO_PG13) | P_FUNCT(2))
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#define P_TMR1 (P_DEFINED | P_IDENT(GPIO_PG14) | P_FUNCT(2))
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#endif
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#define P_TMR2 (P_DEFINED | P_IDENT(GPIO_PF9) | P_FUNCT(2))
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#define P_TMR3 (P_DEFINED | P_IDENT(GPIO_PF10) | P_FUNCT(2))
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#define P_TMR4 (P_DEFINED | P_IDENT(GPIO_PG9) | P_FUNCT(2))
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@ -158,23 +170,33 @@
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#define P_TWI0_SDA (P_DONTCARE)
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/* PWM */
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#define P_PWM0_AH (P_DEFINED | P_IDENT(GPIO_PF1) | P_FUNCT(2))
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#define P_PWM0_AL (P_DEFINED | P_IDENT(GPIO_PF2) | P_FUNCT(2))
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#define P_PWM0_BH (P_DEFINED | P_IDENT(GPIO_PF3) | P_FUNCT(2))
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#define P_PWM0_BL (P_DEFINED | P_IDENT(GPIO_PF4) | P_FUNCT(2))
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#define P_PWM0_CH (P_DEFINED | P_IDENT(GPIO_PF5) | P_FUNCT(2))
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#define P_PWM0_CL (P_DEFINED | P_IDENT(GPIO_PF6) | P_FUNCT(2))
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#define P_PWM0_SYNC (P_DEFINED | P_IDENT(GPIO_PF7) | P_FUNCT(2))
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#ifndef CONFIG_BF518_PWM_PORTF_PORTG
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#define P_PWM_AH (P_DEFINED | P_IDENT(GPIO_PF1) | P_FUNCT(2))
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#define P_PWM_AL (P_DEFINED | P_IDENT(GPIO_PF2) | P_FUNCT(2))
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#define P_PWM_BH (P_DEFINED | P_IDENT(GPIO_PF3) | P_FUNCT(2))
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#define P_PWM_BL (P_DEFINED | P_IDENT(GPIO_PF4) | P_FUNCT(2))
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#define P_PWM_CH (P_DEFINED | P_IDENT(GPIO_PF5) | P_FUNCT(2))
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#define P_PWM_CL (P_DEFINED | P_IDENT(GPIO_PF6) | P_FUNCT(2))
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#else
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#define P_PWM_AH (P_DEFINED | P_IDENT(GPIO_PF11) | P_FUNCT(2))
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#define P_PWM_AL (P_DEFINED | P_IDENT(GPIO_PF12) | P_FUNCT(2))
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#define P_PWM_BH (P_DEFINED | P_IDENT(GPIO_PF13) | P_FUNCT(2))
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#define P_PWM_BL (P_DEFINED | P_IDENT(GPIO_PF14) | P_FUNCT(2))
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#define P_PWM_CH (P_DEFINED | P_IDENT(GPIO_PG1) | P_FUNCT(2))
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#define P_PWM_CL (P_DEFINED | P_IDENT(GPIO_PG2) | P_FUNCT(2))
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#endif
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#define P_PWM1_AH (P_DEFINED | P_IDENT(GPIO_PF11) | P_FUNCT(2))
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#define P_PWM1_AL (P_DEFINED | P_IDENT(GPIO_PF12) | P_FUNCT(2))
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#define P_PWM1_BH (P_DEFINED | P_IDENT(GPIO_PF13) | P_FUNCT(2))
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#define P_PWM1_BL (P_DEFINED | P_IDENT(GPIO_PF14) | P_FUNCT(2))
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#define P_PWM1_CH (P_DEFINED | P_IDENT(GPIO_PG1) | P_FUNCT(2))
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#define P_PWM1_CL (P_DEFINED | P_IDENT(GPIO_PG2) | P_FUNCT(2))
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#define P_PWM1_SYNC (P_DEFINED | P_IDENT(GPIO_PF15) | P_FUNCT(2))
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#ifndef CONFIG_BF518_PWM_SYNC_PF15
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#define P_PWM_SYNC (P_DEFINED | P_IDENT(GPIO_PF7) | P_FUNCT(2))
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#else
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#define P_PWM_SYNC (P_DEFINED | P_IDENT(GPIO_PF15) | P_FUNCT(2))
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#endif
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#ifndef CONFIG_BF518_PWM_TRIPB_PG14
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#define P_PWM_TRIPB (P_DEFINED | P_IDENT(GPIO_PG10) | P_FUNCT(2))
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#else
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#define P_PWM_TRIPB (P_DEFINED | P_IDENT(GPIO_PG14) | P_FUNCT(2))
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#endif
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/* RSI */
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#define P_RSI_DATA0 (P_DEFINED | P_IDENT(GPIO_PG3) | P_FUNCT(1))
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