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USB: ehci tdi : let's tdi_reset set host mode

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tdi_reset is already taking care of setting host mode for tdi devices.
Don't duplicate code in platform driver.

Make ehci_halt a nop if the controller is not in host mode (otherwise it 
will fail), and let's ehci_reset do the tdi_reset.
We need to move hcd->has_tt flags before ehci_halt, in order ehci_halt 
knows we are a tdi device.


Before the setup routine was doing :
- put controller in host mode
- ehci_halt
- ehci_init
- hcd->has_tt = 1;
- ehci_reset

Now we do :
- hcd->has_tt = 1;
- ehci_halt
- ehci_init
- ehci_reset

PS : now we handle correctly the device -> host transition.

Signed-off-by: Matthieu CASTET <matthieu.castet@parrot.com>
Cc: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
Matthieu CASTET 2010-09-06 18:26:56 +02:00 committed by Greg Kroah-Hartman
parent eabf0f5f09
commit 65fd42724a
4 changed files with 20 additions and 15 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
drivers/usb/host/ehci-fsl.c
View File

@ -233,8 +233,6 @@ static void mpc83xx_usb_setup(struct usb_hcd *hcd)
mpc83xx_setup_phy(ehci, pdata->phy_mode, 1); mpc83xx_setup_phy(ehci, pdata->phy_mode, 1);
} }
/* put controller in host mode. */
ehci_writel(ehci, 0x00000003, non_ehci + FSL_SOC_USB_USBMODE);
#ifdef CONFIG_PPC_85xx #ifdef CONFIG_PPC_85xx
out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x00000008); out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x00000008);
out_be32(non_ehci + FSL_SOC_USB_AGECNTTHRSH, 0x00000080); out_be32(non_ehci + FSL_SOC_USB_AGECNTTHRSH, 0x00000080);
@ -270,6 +268,8 @@ static int ehci_fsl_setup(struct usb_hcd *hcd)
/* cache this readonly data; minimize chip reads */ /* cache this readonly data; minimize chip reads */
ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params); ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
hcd->has_tt = 1;
retval = ehci_halt(ehci); retval = ehci_halt(ehci);
if (retval) if (retval)
return retval; return retval;
@ -279,8 +279,6 @@ static int ehci_fsl_setup(struct usb_hcd *hcd)
if (retval) if (retval)
return retval; return retval;
hcd->has_tt = 1;
ehci->sbrn = 0x20; ehci->sbrn = 0x20;
ehci_reset(ehci); ehci_reset(ehci);

1
drivers/usb/host/ehci-fsl.h
View File

@ -27,7 +27,6 @@
#define PORT_PTS_SERIAL (3<<30) #define PORT_PTS_SERIAL (3<<30)
#define PORT_PTS_PTW (1<<28) #define PORT_PTS_PTW (1<<28)
#define FSL_SOC_USB_PORTSC2 0x188 #define FSL_SOC_USB_PORTSC2 0x188
#define FSL_SOC_USB_USBMODE 0x1a8
#define FSL_SOC_USB_SNOOP1 0x400 /* NOTE: big-endian */ #define FSL_SOC_USB_SNOOP1 0x400 /* NOTE: big-endian */
#define FSL_SOC_USB_SNOOP2 0x404 /* NOTE: big-endian */ #define FSL_SOC_USB_SNOOP2 0x404 /* NOTE: big-endian */
#define FSL_SOC_USB_AGECNTTHRSH 0x408 /* NOTE: big-endian */ #define FSL_SOC_USB_AGECNTTHRSH 0x408 /* NOTE: big-endian */

15
drivers/usb/host/ehci-hcd.c
View File

@ -194,6 +194,17 @@ static int handshake (struct ehci_hcd *ehci, void __iomem *ptr,
return -ETIMEDOUT; return -ETIMEDOUT;
} }
/* check TDI/ARC silicon is in host mode */
static int tdi_in_host_mode (struct ehci_hcd *ehci)
{
u32 __iomem *reg_ptr;
u32 tmp;
reg_ptr = (u32 __iomem *)(((u8 __iomem *)ehci->regs) + USBMODE);
tmp = ehci_readl(ehci, reg_ptr);
return (tmp & 3) == USBMODE_CM_HC;
}
/* force HC to halt state from unknown (EHCI spec section 2.3) */ /* force HC to halt state from unknown (EHCI spec section 2.3) */
static int ehci_halt (struct ehci_hcd *ehci) static int ehci_halt (struct ehci_hcd *ehci)
{ {
@ -202,6 +213,10 @@ static int ehci_halt (struct ehci_hcd *ehci)
/* disable any irqs left enabled by previous code */ /* disable any irqs left enabled by previous code */
ehci_writel(ehci, 0, &ehci->regs->intr_enable); ehci_writel(ehci, 0, &ehci->regs->intr_enable);
if (ehci_is_TDI(ehci) && tdi_in_host_mode(ehci) == 0) {
return 0;
}
if ((temp & STS_HALT) != 0) if ((temp & STS_HALT) != 0)
return 0; return 0;

13
drivers/usb/host/ehci-mxc.c
View File

@ -26,9 +26,6 @@
#include <mach/mxc_ehci.h> #include <mach/mxc_ehci.h>
#define ULPI_VIEWPORT_OFFSET 0x170 #define ULPI_VIEWPORT_OFFSET 0x170
#define PORTSC_OFFSET 0x184
#define USBMODE_OFFSET 0x1a8
#define USBMODE_CM_HOST 3
struct ehci_mxc_priv { struct ehci_mxc_priv {
struct clk *usbclk, *ahbclk; struct clk *usbclk, *ahbclk;
@ -51,6 +48,8 @@ static int ehci_mxc_setup(struct usb_hcd *hcd)
/* cache this readonly data; minimize chip reads */ /* cache this readonly data; minimize chip reads */
ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params); ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
hcd->has_tt = 1;
retval = ehci_halt(ehci); retval = ehci_halt(ehci);
if (retval) if (retval)
return retval; return retval;
@ -60,8 +59,6 @@ static int ehci_mxc_setup(struct usb_hcd *hcd)
if (retval) if (retval)
return retval; return retval;
hcd->has_tt = 1;
ehci->sbrn = 0x20; ehci->sbrn = 0x20;
ehci_reset(ehci); ehci_reset(ehci);
@ -191,12 +188,8 @@ static int ehci_mxc_drv_probe(struct platform_device *pdev)
clk_enable(priv->ahbclk); clk_enable(priv->ahbclk);
} }
/* set USBMODE to host mode */
temp = readl(hcd->regs + USBMODE_OFFSET);
writel(temp | USBMODE_CM_HOST, hcd->regs + USBMODE_OFFSET);
/* set up the PORTSCx register */ /* set up the PORTSCx register */
writel(pdata->portsc, hcd->regs + PORTSC_OFFSET); ehci_writel(ehci, pdata->portsc, &ehci->regs->port_status[0]);
mdelay(10); mdelay(10);
/* setup specific usb hw */ /* setup specific usb hw */