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OMAP: Fix sparse warnings in l3 error handler.
Fix below sparse warnings from the l3-noc and l3-smx error handlers files. arch/arm/mach-omap2/omap_l3_smx.h:209:22: warning: symbol 'omap3_l3_app_bases' was not declared. Should it be static? arch/arm/mach-omap2/omap_l3_smx.h:308:22: warning: symbol 'omap3_l3_debug_bases' was not declared. Should it be static? arch/arm/mach-omap2/omap_l3_smx.h:325:2: warning: incorrect type in initializer (different address spaces) arch/arm/mach-omap2/omap_l3_smx.h:325:2: expected unsigned int [usertype] * arch/arm/mach-omap2/omap_l3_smx.h:325:2: got unsigned int [noderef] [toplevel] <asn:2>*<noident> arch/arm/mach-omap2/omap_l3_smx.h:326:2: warning: incorrect type in initializer (different address spaces) arch/arm/mach-omap2/omap_l3_smx.h:326:2: expected unsigned int [usertype] * arch/arm/mach-omap2/omap_l3_smx.h:326:2: got unsigned int [noderef] [toplevel] <asn:2>*<noident> arch/arm/mach-omap2/omap_l3_smx.h:324:5: warning: symbol 'omap3_l3_bases' was not declared. Should it be static? CC arch/arm/mach-omap2/omap_l3_smx.o CHECK arch/arm/mach-omap2/omap_l3_noc.c arch/arm/mach-omap2/omap_l3_noc.c:73:13: warning: symbol '__v' shadows an earlier one arch/arm/mach-omap2/omap_l3_noc.c:73:13: originally declared here arch/arm/mach-omap2/omap_l3_noc.c:83:20: warning: symbol '__v' shadows an earlier one arch/arm/mach-omap2/omap_l3_noc.c:83:20: originally declared here arch/arm/mach-omap2/omap_l3_noc.c:90:5: warning: symbol '__v' shadows an earlier one arch/arm/mach-omap2/omap_l3_noc.c:90:5: originally declared here arch/arm/mach-omap2/omap_l3_noc.h:39:5: warning: symbol 'l3_flagmux' was not declared. Should it be static? arch/arm/mach-omap2/omap_l3_noc.h:46:5: warning: symbol 'l3_targ_inst_clk1' was not declared. Should it be static? arch/arm/mach-omap2/omap_l3_noc.h:54:5: warning: symbol 'l3_targ_inst_clk2' was not declared. Should it be static? arch/arm/mach-omap2/omap_l3_noc.h:75:5: warning: symbol 'l3_targ_inst_clk3' was not declared. Should it be static? arch/arm/mach-omap2/omap_l3_noc.h:79:6: warning: symbol 'l3_targ_inst_name' was not declared. Should it be static? arch/arm/mach-omap2/omap_l3_noc.h:112:5: warning: symbol 'l3_targ' was not declared. Should it be static? arch/arm/mach-omap2/omap_l3_noc.c:72:11: warning: cast removes address space of expression arch/arm/mach-omap2/omap_l3_noc.c:73:13: warning: incorrect type in argument 1 (different base types) arch/arm/mach-omap2/omap_l3_noc.c:73:13: expected void const volatile [noderef] <asn:2>*<noident> arch/arm/mach-omap2/omap_l3_noc.c:73:13: got unsigned int arch/arm/mach-omap2/omap_l3_noc.c:83:20: warning: incorrect type in argument 1 (different base types) arch/arm/mach-omap2/omap_l3_noc.c:83:20: expected void const volatile [noderef] <asn:2>*<noident> arch/arm/mach-omap2/omap_l3_noc.c:83:20: got unsigned int arch/arm/mach-omap2/omap_l3_noc.c:90:5: warning: incorrect type in argument 1 (different base types) arch/arm/mach-omap2/omap_l3_noc.c:90:5: expected void const volatile [noderef] <asn:2>*<noident> arch/arm/mach-omap2/omap_l3_noc.c:90:5: got unsigned int arch/arm/mach-omap2/omap_l3_noc.c:96:5: warning: incorrect type in argument 1 (different base types) arch/arm/mach-omap2/omap_l3_noc.c:96:5: expected void const volatile [noderef] <asn:2>*<noident> arch/arm/mach-omap2/omap_l3_noc.c:96:5: got unsigned int arch/arm/mach-omap2/omap_l3_noc.c:108:5: warning: incorrect type in argument 1 (different base types) arch/arm/mach-omap2/omap_l3_noc.c:108:5: expected void const volatile [noderef] <asn:2>*<noident> arch/arm/mach-omap2/omap_l3_noc.c:108:5: got unsigned int Signed-off-by: sricharan <r.sricharan@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reported-by: Paul Walmsley <paul@pwsan.com> Reviewed-by: Paul Walmsley <paul@pwsan.com>
This commit is contained in:
sricharan
Santosh Shilimkar
parent
ed0e352073
commit
6616aac66d
@ -58,7 +58,8 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
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struct omap4_l3 *l3 = _l3;
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int inttype, i;
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int err_src = 0;
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u32 std_err_main, err_reg, clear, base, l3_targ_base;
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u32 std_err_main, err_reg, clear;
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void __iomem *base, *l3_targ_base;
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char *source_name;
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/* Get the Type of interrupt */
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@ -69,8 +70,8 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
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* Read the regerr register of the clock domain
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* to determine the source
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*/
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base = (u32)l3->l3_base[i];
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err_reg = readl(base + l3_flagmux[i] +
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base = l3->l3_base[i];
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err_reg = __raw_readl(base + l3_flagmux[i] +
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+ L3_FLAGMUX_REGERR0 + (inttype << 3));
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/* Get the corresponding error and analyse */
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@ -80,7 +81,7 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
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/* Read the stderrlog_main_source from clk domain */
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l3_targ_base = base + *(l3_targ[i] + err_src);
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std_err_main = readl(l3_targ_base +
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std_err_main = __raw_readl(l3_targ_base +
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L3_TARG_STDERRLOG_MAIN);
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switch (std_err_main & CUSTOM_ERROR) {
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@ -89,7 +90,7 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
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l3_targ_inst_name[i][err_src];
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WARN(true, "L3 standard error: SOURCE:%s at address 0x%x\n",
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source_name,
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readl(l3_targ_base +
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__raw_readl(l3_targ_base +
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L3_TARG_STDERRLOG_SLVOFSLSB));
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/* clear the std error log*/
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clear = std_err_main | CLEAR_STDERR_LOG;
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@ -36,14 +36,14 @@
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#define L3_TARG_STDERRLOG_SLVOFSLSB 0x5c
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#define L3_FLAGMUX_REGERR0 0xc
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u32 l3_flagmux[L3_MODULES] = {
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static u32 l3_flagmux[L3_MODULES] = {
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0x500,
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0x1000,
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0X0200
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};
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/* L3 Target standard Error register offsets */
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u32 l3_targ_inst_clk1[] = {
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static u32 l3_targ_inst_clk1[] = {
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0x100, /* DMM1 */
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0x200, /* DMM2 */
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0x300, /* ABE */
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@ -51,7 +51,7 @@ u32 l3_targ_inst_clk1[] = {
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0x600 /* CLK2 PWR DISC */
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};
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u32 l3_targ_inst_clk2[] = {
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static u32 l3_targ_inst_clk2[] = {
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0x500, /* CORTEX M3 */
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0x300, /* DSS */
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0x100, /* GPMC */
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@ -72,11 +72,11 @@ u32 l3_targ_inst_clk2[] = {
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0xB00 /* L4 PER2*/
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};
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u32 l3_targ_inst_clk3[] = {
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static u32 l3_targ_inst_clk3[] = {
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0x0100 /* EMUSS */
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};
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char *l3_targ_inst_name[L3_MODULES][18] = {
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static char *l3_targ_inst_name[L3_MODULES][18] = {
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{
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"DMM1",
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"DMM2",
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@ -109,7 +109,7 @@ char *l3_targ_inst_name[L3_MODULES][18] = {
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},
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};
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u32 *l3_targ[L3_MODULES] = {
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static u32 *l3_targ[L3_MODULES] = {
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l3_targ_inst_clk1,
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l3_targ_inst_clk2,
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l3_targ_inst_clk3,
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@ -206,7 +206,7 @@ struct omap3_l3 {
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};
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/* offsets for l3 agents in order with the Flag status register */
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unsigned int __iomem omap3_l3_app_bases[] = {
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static unsigned int omap3_l3_app_bases[] = {
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/* MPU IA */
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0x1400,
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0x1400,
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@ -305,7 +305,7 @@ unsigned int __iomem omap3_l3_app_bases[] = {
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0,
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};
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unsigned int __iomem omap3_l3_debug_bases[] = {
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static unsigned int omap3_l3_debug_bases[] = {
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/* MPU DATA IA */
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0x1400,
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/* RESERVED */
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@ -321,7 +321,7 @@ unsigned int __iomem omap3_l3_debug_bases[] = {
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/* REST RESERVED */
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};
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u32 *omap3_l3_bases[] = {
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static u32 *omap3_l3_bases[] = {
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omap3_l3_app_bases,
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omap3_l3_debug_bases,
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};
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