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cmd64x: use interrupt status from MRDMODE register (take 2)
Fold the parts of the ide_dma_end() methods identical to __ide_dma_end() into a mere call to it. Start using faster versions of the ide_dma_end() and ide_dma_test_irq() methods for the PCI0646U and newer chips that have the duplicate interrupt status bits in the I/O mapped MRDMODE register, determing what methods to use at the driver load time. Do some cleanup/renaming in the "old" ide_dma_test_irq() method too. Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
This commit is contained in:
Sergei Shtylyov
Bartlomiej Zolnierkiewicz
parent
5826b318aa
commit
66602c83dc
@ -1,5 +1,5 @@
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/*
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* linux/drivers/ide/pci/cmd64x.c Version 1.46 Mar 16, 2007
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* linux/drivers/ide/pci/cmd64x.c Version 1.47 Mar 19, 2007
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*
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* cmd64x.c: Enable interrupts at initialization time on Ultra/PCI machines.
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* Due to massive hardware bugs, UltraDMA is only supported
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@ -425,67 +425,80 @@ static int cmd64x_config_drive_for_dma (ide_drive_t *drive)
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return -1;
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}
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static int cmd64x_alt_dma_status (struct pci_dev *dev)
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static int cmd648_ide_dma_end (ide_drive_t *drive)
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{
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switch(dev->device) {
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case PCI_DEVICE_ID_CMD_648:
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case PCI_DEVICE_ID_CMD_649:
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return 1;
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default:
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break;
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}
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return 0;
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ide_hwif_t *hwif = HWIF(drive);
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int err = __ide_dma_end(drive);
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u8 irq_mask = hwif->channel ? MRDMODE_INTR_CH1 :
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MRDMODE_INTR_CH0;
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u8 mrdmode = inb(hwif->dma_master + 0x01);
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/* clear the interrupt bit */
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outb(mrdmode | irq_mask, hwif->dma_master + 0x01);
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return err;
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}
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static int cmd64x_ide_dma_end (ide_drive_t *drive)
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{
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u8 dma_stat = 0, dma_cmd = 0;
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ide_hwif_t *hwif = HWIF(drive);
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struct pci_dev *dev = hwif->pci_dev;
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drive->waiting_for_dma = 0;
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/* read DMA command state */
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dma_cmd = inb(hwif->dma_command);
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/* stop DMA */
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outb(dma_cmd & ~1, hwif->dma_command);
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/* get DMA status */
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dma_stat = inb(hwif->dma_status);
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/* clear the INTR & ERROR bits */
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outb(dma_stat | 6, hwif->dma_status);
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if (cmd64x_alt_dma_status(dev)) {
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u8 dma_intr = 0;
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u8 dma_mask = (hwif->channel) ? ARTTIM23_INTR_CH1 :
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int irq_reg = hwif->channel ? ARTTIM23 : CFR;
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u8 irq_mask = hwif->channel ? ARTTIM23_INTR_CH1 :
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CFR_INTR_CH0;
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u8 dma_reg = (hwif->channel) ? ARTTIM2 : CFR;
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(void) pci_read_config_byte(dev, dma_reg, &dma_intr);
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/* clear the INTR bit */
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(void) pci_write_config_byte(dev, dma_reg, dma_intr|dma_mask);
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u8 irq_stat = 0;
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int err = __ide_dma_end(drive);
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(void) pci_read_config_byte(dev, irq_reg, &irq_stat);
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/* clear the interrupt bit */
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(void) pci_write_config_byte(dev, irq_reg, irq_stat | irq_mask);
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return err;
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}
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/* purge DMA mappings */
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ide_destroy_dmatable(drive);
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/* verify good DMA status */
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return (dma_stat & 7) != 4;
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static int cmd648_ide_dma_test_irq (ide_drive_t *drive)
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{
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ide_hwif_t *hwif = HWIF(drive);
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u8 irq_mask = hwif->channel ? MRDMODE_INTR_CH1 :
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MRDMODE_INTR_CH0;
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u8 dma_stat = inb(hwif->dma_status);
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u8 mrdmode = inb(hwif->dma_master + 0x01);
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#ifdef DEBUG
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printk("%s: dma_stat: 0x%02x mrdmode: 0x%02x irq_mask: 0x%02x\n",
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drive->name, dma_stat, mrdmode, irq_mask);
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#endif
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if (!(mrdmode & irq_mask))
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return 0;
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/* return 1 if INTR asserted */
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if (dma_stat & 4)
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return 1;
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return 0;
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}
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static int cmd64x_ide_dma_test_irq (ide_drive_t *drive)
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{
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ide_hwif_t *hwif = HWIF(drive);
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struct pci_dev *dev = hwif->pci_dev;
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u8 irq_reg = hwif->channel ? ARTTIM23 : CFR;
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u8 irq_stat = 0, mask = hwif->channel ? ARTTIM23_INTR_CH1 : CFR_INTR_CH0;
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int irq_reg = hwif->channel ? ARTTIM23 : CFR;
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u8 irq_mask = hwif->channel ? ARTTIM23_INTR_CH1 :
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CFR_INTR_CH0;
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u8 dma_stat = inb(hwif->dma_status);
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u8 irq_stat = 0;
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(void) pci_read_config_byte(dev, irq_reg, &irq_stat);
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#ifdef DEBUG
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printk("%s: dma_stat: 0x%02x irq_stat: 0x%02x mask: 0x%02x\n",
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drive->name, dma_stat, irq_stat, mask);
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printk("%s: dma_stat: 0x%02x irq_stat: 0x%02x irq_mask: 0x%02x\n",
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drive->name, dma_stat, irq_stat, irq_mask);
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#endif
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if (!(irq_stat & mask))
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if (!(irq_stat & irq_mask))
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return 0;
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/* return 1 if INTR asserted */
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if ((dma_stat & 4) == 4)
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if (dma_stat & 4)
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return 1;
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return 0;
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@ -645,17 +658,25 @@ static void __devinit init_hwif_cmd64x(ide_hwif_t *hwif)
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if (!(hwif->udma_four))
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hwif->udma_four = ata66_cmd64x(hwif);
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if (dev->device == PCI_DEVICE_ID_CMD_646) {
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switch(dev->device) {
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case PCI_DEVICE_ID_CMD_648:
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case PCI_DEVICE_ID_CMD_649:
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alt_irq_bits:
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hwif->ide_dma_end = &cmd648_ide_dma_end;
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hwif->ide_dma_test_irq = &cmd648_ide_dma_test_irq;
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break;
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case PCI_DEVICE_ID_CMD_646:
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hwif->chipset = ide_cmd646;
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if (class_rev == 0x01) {
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hwif->ide_dma_end = &cmd646_1_ide_dma_end;
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} else {
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hwif->ide_dma_end = &cmd64x_ide_dma_end;
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hwif->ide_dma_test_irq = &cmd64x_ide_dma_test_irq;
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}
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} else {
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break;
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} else if (class_rev >= 0x03)
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goto alt_irq_bits;
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/* fall thru */
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default:
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hwif->ide_dma_end = &cmd64x_ide_dma_end;
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hwif->ide_dma_test_irq = &cmd64x_ide_dma_test_irq;
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break;
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}
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