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arm64: dts: mt8173: Fixup pinctrl nodes

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The 8173 pinctrl node doesn't follow dts convention. Fix them.
Also add a comment to explain pinctrl register usage to make it
more clear.

Signed-off-by: Yingjoe Chen <yingjoe.chen@mediatek.com>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This commit is contained in:
Yingjoe Chen 2015-05-01 14:49:31 +08:00 committed by Matthias Brugger
parent b787f68c36
commit 6769b93c08
1 changed files with 13 additions and 9 deletions
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22
arch/arm64/boot/dts/mediatek/mt8173.dtsi
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@ -106,14 +106,13 @@
compatible = "simple-bus";
ranges;
syscfg_pctl_a: syscfg_pctl_a@10005000 {
compatible = "mediatek,mt8173-pctl-a-syscfg", "syscon";
reg = <0 0x10005000 0 0x1000>;
};
pio: pinctrl@0x10005000 {
/*
* Pinctrl access register at 0x10005000 through regmap.
* Register 0x1000b000 is used by EINT.
*/
pio: pinctrl@10005000 {
compatible = "mediatek,mt8173-pinctrl";
reg = <0 0x1000B000 0 0x1000>;
reg = <0 0x1000b000 0 0x1000>;
mediatek,pctl-regmap = <&syscfg_pctl_a>;
pins-are-numbered;
gpio-controller;
@ -121,8 +120,13 @@
interrupt-controller;
#interrupt-cells = <2>;
interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
<GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
};
syscfg_pctl_a: syscfg_pctl_a@10005000 {
compatible = "mediatek,mt8173-pctl-a-syscfg", "syscon";
reg = <0 0x10005000 0 0x1000>;
};
sysirq: intpol-controller@10200620 {