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igb: remove ASPM L0s workaround
The L0s workaround should be moved into a pci quirk and so it is not necessary in the driver. This update removes the L0s workaround from the igb driver. This was the second half of the PCI quirk patch that Matthew Wilcox did not pick up when he picked up the quirk patch. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -1023,11 +1023,10 @@ static int __devinit igb_probe(struct pci_dev *pdev,
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struct net_device *netdev;
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struct igb_adapter *adapter;
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struct e1000_hw *hw;
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struct pci_dev *us_dev;
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const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
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unsigned long mmio_start, mmio_len;
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int i, err, pci_using_dac, pos;
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u16 eeprom_data = 0, state = 0;
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int i, err, pci_using_dac;
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u16 eeprom_data = 0;
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u16 eeprom_apme_mask = IGB_EEPROM_APME;
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u32 part_num;
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int bars, need_ioport;
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@ -1062,27 +1061,6 @@ static int __devinit igb_probe(struct pci_dev *pdev,
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}
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}
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/* 82575 requires that the pci-e link partner disable the L0s state */
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switch (pdev->device) {
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case E1000_DEV_ID_82575EB_COPPER:
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case E1000_DEV_ID_82575EB_FIBER_SERDES:
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case E1000_DEV_ID_82575GB_QUAD_COPPER:
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us_dev = pdev->bus->self;
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pos = pci_find_capability(us_dev, PCI_CAP_ID_EXP);
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if (pos) {
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pci_read_config_word(us_dev, pos + PCI_EXP_LNKCTL,
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&state);
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state &= ~PCIE_LINK_STATE_L0S;
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pci_write_config_word(us_dev, pos + PCI_EXP_LNKCTL,
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state);
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dev_info(&pdev->dev,
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"Disabling ASPM L0s upstream switch port %s\n",
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pci_name(us_dev));
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}
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default:
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break;
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}
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err = pci_request_selected_regions(pdev, bars, igb_driver_name);
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if (err)
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goto err_pci_reg;
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