mirror of
https://github.com/FEX-Emu/linux.git
synced 2024-12-28 20:37:27 +00:00
Merge branch 'renesas/drivers-sci2' into next/drivers
* renesas/drivers-sci2: serial: sh-sci: Rework baud rate calculation serial: sh-sci: Compute overrun_bit without using baud rate algo serial: sh-sci: Remove unused GPIO request code serial: sh-sci: Move overrun_bit and error_mask fields out of pdata serial: sh-sci: Support resources passed through platform resources serial: sh-sci: Don't check IRQ in verify port operation serial: sh-sci: Set the UPF_FIXED_PORT flag serial: sh-sci: Remove duplicate interrupt check in verify port op serial: sh-sci: Simplify baud rate calculation algorithms serial: sh-sci: Remove baud rate calculation algorithm 5 serial: sh-sci: Sort headers alphabetically serial: sh-sci: Convert to clk_prepare/unprepare serial: sh-sci: Don't enable/disable port from within break timer serial: sh-sci: Fix warnings due to improper casts and printk formats
This commit is contained in:
commit
6878e0c0a5
@ -23,35 +23,34 @@
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#undef DEBUG
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#include <linux/module.h>
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#include <linux/errno.h>
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#include <linux/sh_dma.h>
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#include <linux/timer.h>
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#include <linux/interrupt.h>
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#include <linux/tty.h>
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#include <linux/tty_flip.h>
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#include <linux/serial.h>
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#include <linux/major.h>
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#include <linux/string.h>
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#include <linux/sysrq.h>
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#include <linux/ioport.h>
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#include <linux/mm.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/console.h>
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#include <linux/platform_device.h>
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#include <linux/serial_sci.h>
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#include <linux/notifier.h>
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#include <linux/pm_runtime.h>
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#include <linux/cpufreq.h>
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#include <linux/clk.h>
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#include <linux/console.h>
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#include <linux/ctype.h>
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#include <linux/err.h>
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#include <linux/cpufreq.h>
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#include <linux/delay.h>
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#include <linux/dmaengine.h>
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#include <linux/dma-mapping.h>
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#include <linux/err.h>
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#include <linux/errno.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/ioport.h>
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#include <linux/major.h>
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#include <linux/module.h>
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#include <linux/mm.h>
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#include <linux/notifier.h>
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#include <linux/platform_device.h>
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#include <linux/pm_runtime.h>
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#include <linux/scatterlist.h>
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#include <linux/serial.h>
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#include <linux/serial_sci.h>
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#include <linux/sh_dma.h>
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#include <linux/slab.h>
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#include <linux/gpio.h>
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#include <linux/string.h>
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#include <linux/sysrq.h>
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#include <linux/timer.h>
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#include <linux/tty.h>
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#include <linux/tty_flip.h>
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#ifdef CONFIG_SUPERH
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#include <asm/sh_bios.h>
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@ -64,6 +63,10 @@ struct sci_port {
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/* Platform configuration */
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struct plat_sci_port *cfg;
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int overrun_bit;
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unsigned int error_mask;
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unsigned int sampling_rate;
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/* Break timer */
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struct timer_list break_timer;
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@ -74,8 +77,8 @@ struct sci_port {
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/* Function clock */
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struct clk *fclk;
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int irqs[SCIx_NR_IRQS];
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char *irqstr[SCIx_NR_IRQS];
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char *gpiostr[SCIx_NR_FNS];
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struct dma_chan *chan_tx;
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struct dma_chan *chan_rx;
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@ -421,9 +424,9 @@ static void sci_port_enable(struct sci_port *sci_port)
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pm_runtime_get_sync(sci_port->port.dev);
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clk_enable(sci_port->iclk);
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clk_prepare_enable(sci_port->iclk);
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sci_port->port.uartclk = clk_get_rate(sci_port->iclk);
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clk_enable(sci_port->fclk);
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clk_prepare_enable(sci_port->fclk);
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}
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static void sci_port_disable(struct sci_port *sci_port)
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@ -431,8 +434,16 @@ static void sci_port_disable(struct sci_port *sci_port)
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if (!sci_port->port.dev)
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return;
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clk_disable(sci_port->fclk);
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clk_disable(sci_port->iclk);
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/* Cancel the break timer to ensure that the timer handler will not try
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* to access the hardware with clocks and power disabled. Reset the
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* break flag to make the break debouncing state machine ready for the
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* next break.
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*/
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del_timer_sync(&sci_port->break_timer);
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sci_port->break_flag = 0;
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clk_disable_unprepare(sci_port->fclk);
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clk_disable_unprepare(sci_port->iclk);
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pm_runtime_put_sync(sci_port->port.dev);
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}
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@ -557,7 +568,7 @@ static inline int sci_rxd_in(struct uart_port *port)
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return 1;
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/* Cast for ARM damage */
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return !!__raw_readb((void __iomem *)s->cfg->port_reg);
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return !!__raw_readb((void __iomem *)(uintptr_t)s->cfg->port_reg);
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}
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/* ********************************************************************** *
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@ -733,8 +744,6 @@ static void sci_break_timer(unsigned long data)
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{
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struct sci_port *port = (struct sci_port *)data;
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sci_port_enable(port);
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if (sci_rxd_in(&port->port) == 0) {
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port->break_flag = 1;
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sci_schedule_break_timer(port);
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@ -744,8 +753,6 @@ static void sci_break_timer(unsigned long data)
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sci_schedule_break_timer(port);
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} else
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port->break_flag = 0;
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sci_port_disable(port);
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}
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static int sci_handle_errors(struct uart_port *port)
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@ -755,19 +762,15 @@ static int sci_handle_errors(struct uart_port *port)
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struct tty_port *tport = &port->state->port;
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struct sci_port *s = to_sci_port(port);
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/*
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* Handle overruns, if supported.
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*/
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if (s->cfg->overrun_bit != SCIx_NOT_SUPPORTED) {
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if (status & (1 << s->cfg->overrun_bit)) {
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port->icount.overrun++;
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/* Handle overruns */
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if (status & (1 << s->overrun_bit)) {
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port->icount.overrun++;
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/* overrun error */
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if (tty_insert_flip_char(tport, 0, TTY_OVERRUN))
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copied++;
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/* overrun error */
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if (tty_insert_flip_char(tport, 0, TTY_OVERRUN))
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copied++;
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dev_notice(port->dev, "overrun error");
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}
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dev_notice(port->dev, "overrun error");
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}
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if (status & SCxSR_FER(port)) {
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@ -829,7 +832,7 @@ static int sci_handle_fifo_overrun(struct uart_port *port)
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if (!reg->size)
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return 0;
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if ((serial_port_in(port, SCLSR) & (1 << s->cfg->overrun_bit))) {
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if ((serial_port_in(port, SCLSR) & (1 << s->overrun_bit))) {
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serial_port_out(port, SCLSR, 0);
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port->icount.overrun++;
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@ -1075,19 +1078,19 @@ static int sci_request_irq(struct sci_port *port)
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for (i = j = 0; i < SCIx_NR_IRQS; i++, j++) {
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struct sci_irq_desc *desc;
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unsigned int irq;
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int irq;
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if (SCIx_IRQ_IS_MUXED(port)) {
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i = SCIx_MUX_IRQ;
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irq = up->irq;
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} else {
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irq = port->cfg->irqs[i];
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irq = port->irqs[i];
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/*
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* Certain port types won't support all of the
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* available interrupt sources.
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*/
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if (unlikely(!irq))
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if (unlikely(irq < 0))
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continue;
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}
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@ -1112,7 +1115,7 @@ static int sci_request_irq(struct sci_port *port)
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out_noirq:
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while (--i >= 0)
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free_irq(port->cfg->irqs[i], port);
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free_irq(port->irqs[i], port);
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out_nomem:
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while (--j >= 0)
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@ -1130,16 +1133,16 @@ static void sci_free_irq(struct sci_port *port)
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* IRQ first.
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*/
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for (i = 0; i < SCIx_NR_IRQS; i++) {
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unsigned int irq = port->cfg->irqs[i];
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int irq = port->irqs[i];
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/*
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* Certain port types won't support all of the available
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* interrupt sources.
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*/
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if (unlikely(!irq))
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if (unlikely(irq < 0))
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continue;
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free_irq(port->cfg->irqs[i], port);
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free_irq(port->irqs[i], port);
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kfree(port->irqstr[i]);
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if (SCIx_IRQ_IS_MUXED(port)) {
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@ -1149,67 +1152,6 @@ static void sci_free_irq(struct sci_port *port)
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}
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}
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static const char *sci_gpio_names[SCIx_NR_FNS] = {
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"sck", "rxd", "txd", "cts", "rts",
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};
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static const char *sci_gpio_str(unsigned int index)
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{
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return sci_gpio_names[index];
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}
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static void sci_init_gpios(struct sci_port *port)
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{
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struct uart_port *up = &port->port;
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int i;
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if (!port->cfg)
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return;
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for (i = 0; i < SCIx_NR_FNS; i++) {
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const char *desc;
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int ret;
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if (!port->cfg->gpios[i])
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continue;
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desc = sci_gpio_str(i);
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port->gpiostr[i] = kasprintf(GFP_KERNEL, "%s:%s",
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dev_name(up->dev), desc);
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/*
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* If we've failed the allocation, we can still continue
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* on with a NULL string.
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*/
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if (!port->gpiostr[i])
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dev_notice(up->dev, "%s string allocation failure\n",
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desc);
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ret = gpio_request(port->cfg->gpios[i], port->gpiostr[i]);
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if (unlikely(ret != 0)) {
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dev_notice(up->dev, "failed %s gpio request\n", desc);
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/*
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* If we can't get the GPIO for whatever reason,
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* no point in keeping the verbose string around.
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*/
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kfree(port->gpiostr[i]);
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}
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}
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}
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static void sci_free_gpios(struct sci_port *port)
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{
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int i;
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for (i = 0; i < SCIx_NR_FNS; i++)
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if (port->cfg->gpios[i]) {
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gpio_free(port->cfg->gpios[i]);
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kfree(port->gpiostr[i]);
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}
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}
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static unsigned int sci_tx_empty(struct uart_port *port)
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{
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unsigned short status = serial_port_in(port, SCxSR);
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@ -1309,7 +1251,7 @@ static int sci_dma_rx_push(struct sci_port *s, size_t count)
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}
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if (room < count)
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dev_warn(port->dev, "Rx overrun: dropping %u bytes\n",
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dev_warn(port->dev, "Rx overrun: dropping %zu bytes\n",
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count - room);
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if (!room)
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return room;
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@ -1442,7 +1384,7 @@ static void work_fn_rx(struct work_struct *work)
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int count;
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chan->device->device_control(chan, DMA_TERMINATE_ALL, 0);
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dev_dbg(port->dev, "Read %u bytes with cookie %d\n",
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dev_dbg(port->dev, "Read %zu bytes with cookie %d\n",
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sh_desc->partial, sh_desc->cookie);
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spin_lock_irqsave(&port->lock, flags);
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@ -1655,7 +1597,7 @@ static void rx_timer_fn(unsigned long arg)
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if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) {
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scr &= ~0x4000;
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enable_irq(s->cfg->irqs[1]);
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enable_irq(s->irqs[SCIx_RXI_IRQ]);
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}
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serial_port_out(port, SCSCR, scr | SCSCR_RIE);
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dev_dbg(port->dev, "DMA Rx timed out\n");
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@ -1691,16 +1633,17 @@ static void sci_request_dma(struct uart_port *port)
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s->chan_tx = chan;
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sg_init_table(&s->sg_tx, 1);
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/* UART circular tx buffer is an aligned page. */
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BUG_ON((int)port->state->xmit.buf & ~PAGE_MASK);
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BUG_ON((uintptr_t)port->state->xmit.buf & ~PAGE_MASK);
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sg_set_page(&s->sg_tx, virt_to_page(port->state->xmit.buf),
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UART_XMIT_SIZE, (int)port->state->xmit.buf & ~PAGE_MASK);
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UART_XMIT_SIZE,
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(uintptr_t)port->state->xmit.buf & ~PAGE_MASK);
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nent = dma_map_sg(port->dev, &s->sg_tx, 1, DMA_TO_DEVICE);
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if (!nent)
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sci_tx_dma_release(s, false);
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else
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dev_dbg(port->dev, "%s: mapped %d@%p to %x\n", __func__,
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sg_dma_len(&s->sg_tx),
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port->state->xmit.buf, sg_dma_address(&s->sg_tx));
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dev_dbg(port->dev, "%s: mapped %d@%p to %pad\n", __func__,
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sg_dma_len(&s->sg_tx), port->state->xmit.buf,
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&sg_dma_address(&s->sg_tx));
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s->sg_len_tx = nent;
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@ -1740,7 +1683,7 @@ static void sci_request_dma(struct uart_port *port)
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sg_init_table(sg, 1);
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sg_set_page(sg, virt_to_page(buf[i]), s->buf_len_rx,
|
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(int)buf[i] & ~PAGE_MASK);
|
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(uintptr_t)buf[i] & ~PAGE_MASK);
|
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sg_dma_address(sg) = dma[i];
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}
|
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|
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@ -1808,20 +1751,21 @@ static void sci_shutdown(struct uart_port *port)
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sci_free_irq(s);
|
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}
|
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|
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static unsigned int sci_scbrr_calc(unsigned int algo_id, unsigned int bps,
|
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static unsigned int sci_scbrr_calc(struct sci_port *s, unsigned int bps,
|
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unsigned long freq)
|
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{
|
||||
switch (algo_id) {
|
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if (s->sampling_rate)
|
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return DIV_ROUND_CLOSEST(freq, s->sampling_rate * bps) - 1;
|
||||
|
||||
switch (s->cfg->scbrr_algo_id) {
|
||||
case SCBRR_ALGO_1:
|
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return ((freq + 16 * bps) / (16 * bps) - 1);
|
||||
return freq / (16 * bps);
|
||||
case SCBRR_ALGO_2:
|
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return ((freq + 16 * bps) / (32 * bps) - 1);
|
||||
return DIV_ROUND_CLOSEST(freq, 32 * bps) - 1;
|
||||
case SCBRR_ALGO_3:
|
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return (((freq * 2) + 16 * bps) / (16 * bps) - 1);
|
||||
return freq / (8 * bps);
|
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case SCBRR_ALGO_4:
|
||||
return (((freq * 2) + 16 * bps) / (32 * bps) - 1);
|
||||
case SCBRR_ALGO_5:
|
||||
return (((freq * 1000 / 32) / bps) - 1);
|
||||
return DIV_ROUND_CLOSEST(freq, 16 * bps) - 1;
|
||||
}
|
||||
|
||||
/* Warn, but use a safe default */
|
||||
@ -1903,12 +1847,11 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
|
||||
|
||||
baud = uart_get_baud_rate(port, termios, old, 0, max_baud);
|
||||
if (likely(baud && port->uartclk)) {
|
||||
if (s->cfg->scbrr_algo_id == SCBRR_ALGO_6) {
|
||||
if (s->cfg->type == PORT_HSCIF) {
|
||||
sci_baud_calc_hscif(baud, port->uartclk, &t, &srr,
|
||||
&cks);
|
||||
} else {
|
||||
t = sci_scbrr_calc(s->cfg->scbrr_algo_id, baud,
|
||||
port->uartclk);
|
||||
t = sci_scbrr_calc(s, baud, port->uartclk);
|
||||
for (cks = 0; t >= 256 && cks <= 3; cks++)
|
||||
t >>= 2;
|
||||
}
|
||||
@ -2115,10 +2058,6 @@ static void sci_config_port(struct uart_port *port, int flags)
|
||||
|
||||
static int sci_verify_port(struct uart_port *port, struct serial_struct *ser)
|
||||
{
|
||||
struct sci_port *s = to_sci_port(port);
|
||||
|
||||
if (ser->irq != s->cfg->irqs[SCIx_TXI_IRQ] || ser->irq > nr_irqs)
|
||||
return -EINVAL;
|
||||
if (ser->baud_base < 2400)
|
||||
/* No paper tape reader for Mitch.. */
|
||||
return -EINVAL;
|
||||
@ -2151,11 +2090,13 @@ static struct uart_ops sci_uart_ops = {
|
||||
};
|
||||
|
||||
static int sci_init_single(struct platform_device *dev,
|
||||
struct sci_port *sci_port,
|
||||
unsigned int index,
|
||||
struct plat_sci_port *p)
|
||||
struct sci_port *sci_port, unsigned int index,
|
||||
struct plat_sci_port *p, bool early)
|
||||
{
|
||||
struct uart_port *port = &sci_port->port;
|
||||
const struct resource *res;
|
||||
unsigned int sampling_rate;
|
||||
unsigned int i;
|
||||
int ret;
|
||||
|
||||
sci_port->cfg = p;
|
||||
@ -2164,22 +2105,36 @@ static int sci_init_single(struct platform_device *dev,
|
||||
port->iotype = UPIO_MEM;
|
||||
port->line = index;
|
||||
|
||||
switch (p->type) {
|
||||
case PORT_SCIFB:
|
||||
port->fifosize = 256;
|
||||
break;
|
||||
case PORT_HSCIF:
|
||||
port->fifosize = 128;
|
||||
break;
|
||||
case PORT_SCIFA:
|
||||
port->fifosize = 64;
|
||||
break;
|
||||
case PORT_SCIF:
|
||||
port->fifosize = 16;
|
||||
break;
|
||||
default:
|
||||
port->fifosize = 1;
|
||||
break;
|
||||
if (dev->num_resources) {
|
||||
/* Device has resources, use them. */
|
||||
res = platform_get_resource(dev, IORESOURCE_MEM, 0);
|
||||
if (res == NULL)
|
||||
return -ENOMEM;
|
||||
|
||||
port->mapbase = res->start;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(sci_port->irqs); ++i)
|
||||
sci_port->irqs[i] = platform_get_irq(dev, i);
|
||||
|
||||
/* The SCI generates several interrupts. They can be muxed
|
||||
* together or connected to different interrupt lines. In the
|
||||
* muxed case only one interrupt resource is specified. In the
|
||||
* non-muxed case three or four interrupt resources are
|
||||
* specified, as the BRI interrupt is optional.
|
||||
*/
|
||||
if (sci_port->irqs[0] < 0)
|
||||
return -ENXIO;
|
||||
|
||||
if (sci_port->irqs[1] < 0) {
|
||||
sci_port->irqs[1] = sci_port->irqs[0];
|
||||
sci_port->irqs[2] = sci_port->irqs[0];
|
||||
sci_port->irqs[3] = sci_port->irqs[0];
|
||||
}
|
||||
} else {
|
||||
/* No resources, use old-style platform data. */
|
||||
port->mapbase = p->mapbase;
|
||||
for (i = 0; i < ARRAY_SIZE(sci_port->irqs); ++i)
|
||||
sci_port->irqs[i] = p->irqs[i] ? p->irqs[i] : -ENXIO;
|
||||
}
|
||||
|
||||
if (p->regtype == SCIx_PROBE_REGTYPE) {
|
||||
@ -2188,7 +2143,52 @@ static int sci_init_single(struct platform_device *dev,
|
||||
return ret;
|
||||
}
|
||||
|
||||
if (dev) {
|
||||
switch (p->type) {
|
||||
case PORT_SCIFB:
|
||||
port->fifosize = 256;
|
||||
sci_port->overrun_bit = 9;
|
||||
sampling_rate = 16;
|
||||
break;
|
||||
case PORT_HSCIF:
|
||||
port->fifosize = 128;
|
||||
sampling_rate = 0;
|
||||
sci_port->overrun_bit = 0;
|
||||
break;
|
||||
case PORT_SCIFA:
|
||||
port->fifosize = 64;
|
||||
sci_port->overrun_bit = 9;
|
||||
sampling_rate = 16;
|
||||
break;
|
||||
case PORT_SCIF:
|
||||
port->fifosize = 16;
|
||||
if (p->regtype == SCIx_SH7705_SCIF_REGTYPE) {
|
||||
sci_port->overrun_bit = 9;
|
||||
sampling_rate = 16;
|
||||
} else {
|
||||
sci_port->overrun_bit = 0;
|
||||
sampling_rate = 32;
|
||||
}
|
||||
break;
|
||||
default:
|
||||
port->fifosize = 1;
|
||||
sci_port->overrun_bit = 5;
|
||||
sampling_rate = 32;
|
||||
break;
|
||||
}
|
||||
|
||||
/* Set the sampling rate if the baud rate calculation algorithm isn't
|
||||
* specified.
|
||||
*/
|
||||
if (p->scbrr_algo_id == SCBRR_ALGO_NONE) {
|
||||
/* SCIFA on sh7723 and sh7724 need a custom sampling rate that
|
||||
* doesn't match the SoC datasheet, this should be investigated.
|
||||
* Let platform data override the sampling rate for now.
|
||||
*/
|
||||
sci_port->sampling_rate = p->sampling_rate ? p->sampling_rate
|
||||
: sampling_rate;
|
||||
}
|
||||
|
||||
if (!early) {
|
||||
sci_port->iclk = clk_get(&dev->dev, "sci_ick");
|
||||
if (IS_ERR(sci_port->iclk)) {
|
||||
sci_port->iclk = clk_get(&dev->dev, "peripheral_clk");
|
||||
@ -2208,8 +2208,6 @@ static int sci_init_single(struct platform_device *dev,
|
||||
|
||||
port->dev = &dev->dev;
|
||||
|
||||
sci_init_gpios(sci_port);
|
||||
|
||||
pm_runtime_enable(&dev->dev);
|
||||
}
|
||||
|
||||
@ -2220,32 +2218,22 @@ static int sci_init_single(struct platform_device *dev,
|
||||
/*
|
||||
* Establish some sensible defaults for the error detection.
|
||||
*/
|
||||
if (!p->error_mask)
|
||||
p->error_mask = (p->type == PORT_SCI) ?
|
||||
sci_port->error_mask = (p->type == PORT_SCI) ?
|
||||
SCI_DEFAULT_ERROR_MASK : SCIF_DEFAULT_ERROR_MASK;
|
||||
|
||||
/*
|
||||
* Establish sensible defaults for the overrun detection, unless
|
||||
* the part has explicitly disabled support for it.
|
||||
*/
|
||||
if (p->overrun_bit != SCIx_NOT_SUPPORTED) {
|
||||
if (p->type == PORT_SCI)
|
||||
p->overrun_bit = 5;
|
||||
else if (p->scbrr_algo_id == SCBRR_ALGO_4)
|
||||
p->overrun_bit = 9;
|
||||
else
|
||||
p->overrun_bit = 0;
|
||||
|
||||
/*
|
||||
* Make the error mask inclusive of overrun detection, if
|
||||
* supported.
|
||||
*/
|
||||
p->error_mask |= (1 << p->overrun_bit);
|
||||
}
|
||||
/*
|
||||
* Make the error mask inclusive of overrun detection, if
|
||||
* supported.
|
||||
*/
|
||||
sci_port->error_mask |= 1 << sci_port->overrun_bit;
|
||||
|
||||
port->mapbase = p->mapbase;
|
||||
port->type = p->type;
|
||||
port->flags = p->flags;
|
||||
port->flags = UPF_FIXED_PORT | p->flags;
|
||||
port->regshift = p->regshift;
|
||||
|
||||
/*
|
||||
@ -2255,7 +2243,7 @@ static int sci_init_single(struct platform_device *dev,
|
||||
*
|
||||
* For the muxed case there's nothing more to do.
|
||||
*/
|
||||
port->irq = p->irqs[SCIx_RXI_IRQ];
|
||||
port->irq = sci_port->irqs[SCIx_RXI_IRQ];
|
||||
port->irqflags = 0;
|
||||
|
||||
port->serial_in = sci_serial_in;
|
||||
@ -2270,8 +2258,6 @@ static int sci_init_single(struct platform_device *dev,
|
||||
|
||||
static void sci_cleanup_single(struct sci_port *port)
|
||||
{
|
||||
sci_free_gpios(port);
|
||||
|
||||
clk_put(port->iclk);
|
||||
clk_put(port->fclk);
|
||||
|
||||
@ -2387,7 +2373,7 @@ static int sci_probe_earlyprintk(struct platform_device *pdev)
|
||||
|
||||
early_serial_console.index = pdev->id;
|
||||
|
||||
sci_init_single(NULL, &sci_ports[pdev->id], pdev->id, cfg);
|
||||
sci_init_single(pdev, &sci_ports[pdev->id], pdev->id, cfg, true);
|
||||
|
||||
serial_console_setup(&early_serial_console, early_serial_buf);
|
||||
|
||||
@ -2454,7 +2440,7 @@ static int sci_probe_single(struct platform_device *dev,
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
ret = sci_init_single(dev, sciport, index, p);
|
||||
ret = sci_init_single(dev, sciport, index, p, false);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
|
@ -9,7 +9,7 @@
|
||||
#define SCxSR_PER(port) (((port)->type == PORT_SCI) ? SCI_PER : SCIF_PER)
|
||||
#define SCxSR_BRK(port) (((port)->type == PORT_SCI) ? 0x00 : SCIF_BRK)
|
||||
|
||||
#define SCxSR_ERRORS(port) (to_sci_port(port)->cfg->error_mask)
|
||||
#define SCxSR_ERRORS(port) (to_sci_port(port)->error_mask)
|
||||
|
||||
#if defined(CONFIG_CPU_SUBTYPE_SH7705) || \
|
||||
defined(CONFIG_CPU_SUBTYPE_SH7720) || \
|
||||
|
@ -11,11 +11,11 @@
|
||||
#define SCIx_NOT_SUPPORTED (-1)
|
||||
|
||||
enum {
|
||||
SCBRR_ALGO_1, /* ((clk + 16 * bps) / (16 * bps) - 1) */
|
||||
SCBRR_ALGO_2, /* ((clk + 16 * bps) / (32 * bps) - 1) */
|
||||
SCBRR_ALGO_3, /* (((clk * 2) + 16 * bps) / (16 * bps) - 1) */
|
||||
SCBRR_ALGO_4, /* (((clk * 2) + 16 * bps) / (32 * bps) - 1) */
|
||||
SCBRR_ALGO_5, /* (((clk * 1000 / 32) / bps) - 1) */
|
||||
SCBRR_ALGO_NONE, /* Compute sampling rate in the driver */
|
||||
SCBRR_ALGO_1, /* clk / (16 * bps) */
|
||||
SCBRR_ALGO_2, /* DIV_ROUND_CLOSEST(clk, 32 * bps) - 1 */
|
||||
SCBRR_ALGO_3, /* clk / (8 * bps) */
|
||||
SCBRR_ALGO_4, /* DIV_ROUND_CLOSEST(clk, 16 * bps) - 1 */
|
||||
SCBRR_ALGO_6, /* HSCIF variable sample rate algorithm */
|
||||
};
|
||||
|
||||
@ -70,17 +70,6 @@ enum {
|
||||
SCIx_MUX_IRQ = SCIx_NR_IRQS, /* special case */
|
||||
};
|
||||
|
||||
/* Offsets into the sci_port->gpios array */
|
||||
enum {
|
||||
SCIx_SCK,
|
||||
SCIx_RXD,
|
||||
SCIx_TXD,
|
||||
SCIx_CTS,
|
||||
SCIx_RTS,
|
||||
|
||||
SCIx_NR_FNS,
|
||||
};
|
||||
|
||||
enum {
|
||||
SCIx_PROBE_REGTYPE,
|
||||
|
||||
@ -108,10 +97,10 @@ enum {
|
||||
}
|
||||
|
||||
#define SCIx_IRQ_IS_MUXED(port) \
|
||||
((port)->cfg->irqs[SCIx_ERI_IRQ] == \
|
||||
(port)->cfg->irqs[SCIx_RXI_IRQ]) || \
|
||||
((port)->cfg->irqs[SCIx_ERI_IRQ] && \
|
||||
!(port)->cfg->irqs[SCIx_RXI_IRQ])
|
||||
((port)->irqs[SCIx_ERI_IRQ] == \
|
||||
(port)->irqs[SCIx_RXI_IRQ]) || \
|
||||
((port)->irqs[SCIx_ERI_IRQ] && \
|
||||
((port)->irqs[SCIx_RXI_IRQ] < 0))
|
||||
/*
|
||||
* SCI register subset common for all port types.
|
||||
* Not all registers will exist on all parts.
|
||||
@ -142,20 +131,17 @@ struct plat_sci_port_ops {
|
||||
struct plat_sci_port {
|
||||
unsigned long mapbase; /* resource base */
|
||||
unsigned int irqs[SCIx_NR_IRQS]; /* ERI, RXI, TXI, BRI */
|
||||
unsigned int gpios[SCIx_NR_FNS]; /* SCK, RXD, TXD, CTS, RTS */
|
||||
unsigned int type; /* SCI / SCIF / IRDA / HSCIF */
|
||||
upf_t flags; /* UPF_* flags */
|
||||
unsigned long capabilities; /* Port features/capabilities */
|
||||
|
||||
unsigned int sampling_rate;
|
||||
unsigned int scbrr_algo_id; /* SCBRR calculation algo */
|
||||
unsigned int scscr; /* SCSCR initialization */
|
||||
|
||||
/*
|
||||
* Platform overrides if necessary, defaults otherwise.
|
||||
*/
|
||||
int overrun_bit;
|
||||
unsigned int error_mask;
|
||||
|
||||
int port_reg;
|
||||
unsigned char regshift;
|
||||
unsigned char regtype;
|
||||
|
Loading…
Reference in New Issue
Block a user