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serial: driver for ETRAX FS UART
This is the last missing piece to get a kernel booting to a prompt in qemu-cris. Signed-off-by: Niklas Cassel <nks@flawful.org> Acked-by: Jesper Nilsson <jesper.nilsson@axis.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Niklas Cassel
Greg Kroah-Hartman
parent
79ce9d52ae
commit
692132b5b1
@ -1085,6 +1085,16 @@ config SERIAL_VT8500_CONSOLE
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depends on SERIAL_VT8500=y
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select SERIAL_CORE_CONSOLE
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config SERIAL_ETRAXFS
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bool "ETRAX FS serial port support"
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depends on ETRAX_ARCH_V32 && OF
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select SERIAL_CORE
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config SERIAL_ETRAXFS_CONSOLE
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bool "ETRAX FS serial console support"
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depends on SERIAL_ETRAXFS
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select SERIAL_CORE_CONSOLE
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config SERIAL_NETX
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tristate "NetX serial port support"
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depends on ARCH_NETX
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@ -51,6 +51,7 @@ obj-$(CONFIG_SERIAL_MPSC) += mpsc.o
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obj-$(CONFIG_SERIAL_MESON) += meson_uart.o
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obj-$(CONFIG_SERIAL_SB1250_DUART) += sb1250-duart.o
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obj-$(CONFIG_ETRAX_SERIAL) += crisv10.o
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obj-$(CONFIG_SERIAL_ETRAXFS) += etraxfs-uart.o
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obj-$(CONFIG_SERIAL_SCCNXP) += sccnxp.o
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obj-$(CONFIG_SERIAL_SC16IS7XX) += sc16is7xx.o
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obj-$(CONFIG_SERIAL_JSM) += jsm/
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996
drivers/tty/serial/etraxfs-uart.c
Normal file
996
drivers/tty/serial/etraxfs-uart.c
Normal file
@ -0,0 +1,996 @@
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/console.h>
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#include <linux/platform_device.h>
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#include <linux/serial_core.h>
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#include <linux/tty_flip.h>
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#include <linux/of.h>
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#include <linux/gpio.h>
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#include <linux/of_irq.h>
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#include <linux/of_address.h>
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#include <hwregs/ser_defs.h>
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#define DRV_NAME "etraxfs-uart"
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#define UART_NR CONFIG_ETRAX_SERIAL_PORTS
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#define MODIFY_REG(instance, reg, var) \
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do { \
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if (REG_RD_INT(ser, instance, reg) != \
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REG_TYPE_CONV(int, reg_ser_##reg, var)) \
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REG_WR(ser, instance, reg, var); \
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} while (0)
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struct uart_cris_port {
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struct uart_port port;
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int initialized;
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int irq;
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void __iomem *regi_ser;
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struct gpio_desc *dtr_pin;
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struct gpio_desc *dsr_pin;
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struct gpio_desc *ri_pin;
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struct gpio_desc *cd_pin;
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int write_ongoing;
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};
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static struct uart_driver etraxfs_uart_driver;
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static struct uart_port *console_port;
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static int console_baud = 115200;
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static struct uart_cris_port *etraxfs_uart_ports[UART_NR];
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static void cris_serial_port_init(struct uart_port *port, int line);
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static void etraxfs_uart_stop_rx(struct uart_port *port);
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static inline void etraxfs_uart_start_tx_bottom(struct uart_port *port);
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#ifdef CONFIG_SERIAL_ETRAXFS_CONSOLE
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static void
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cris_console_write(struct console *co, const char *s, unsigned int count)
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{
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struct uart_cris_port *up;
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int i;
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reg_ser_r_stat_din stat;
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reg_ser_rw_tr_dma_en tr_dma_en, old;
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up = etraxfs_uart_ports[co->index];
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if (!up)
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return;
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/* Switch to manual mode. */
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tr_dma_en = old = REG_RD(ser, up->regi_ser, rw_tr_dma_en);
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if (tr_dma_en.en == regk_ser_yes) {
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tr_dma_en.en = regk_ser_no;
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REG_WR(ser, up->regi_ser, rw_tr_dma_en, tr_dma_en);
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}
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/* Send data. */
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for (i = 0; i < count; i++) {
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/* LF -> CRLF */
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if (s[i] == '\n') {
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do {
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stat = REG_RD(ser, up->regi_ser, r_stat_din);
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} while (!stat.tr_rdy);
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REG_WR_INT(ser, up->regi_ser, rw_dout, '\r');
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}
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/* Wait until transmitter is ready and send. */
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do {
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stat = REG_RD(ser, up->regi_ser, r_stat_din);
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} while (!stat.tr_rdy);
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REG_WR_INT(ser, up->regi_ser, rw_dout, s[i]);
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}
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/* Restore mode. */
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if (tr_dma_en.en != old.en)
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REG_WR(ser, up->regi_ser, rw_tr_dma_en, old);
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}
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static int __init
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cris_console_setup(struct console *co, char *options)
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{
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struct uart_port *port;
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int baud = 115200;
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int bits = 8;
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int parity = 'n';
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int flow = 'n';
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if (co->index < 0 || co->index >= UART_NR)
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co->index = 0;
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port = &etraxfs_uart_ports[co->index]->port;
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console_port = port;
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co->flags |= CON_CONSDEV;
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if (options)
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uart_parse_options(options, &baud, &parity, &bits, &flow);
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console_baud = baud;
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cris_serial_port_init(port, co->index);
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uart_set_options(port, co, baud, parity, bits, flow);
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return 0;
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}
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static struct tty_driver *cris_console_device(struct console *co, int *index)
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{
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struct uart_driver *p = co->data;
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*index = co->index;
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return p->tty_driver;
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}
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static struct console cris_console = {
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.name = "ttyS",
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.write = cris_console_write,
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.device = cris_console_device,
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.setup = cris_console_setup,
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.flags = CON_PRINTBUFFER,
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.index = -1,
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.data = &etraxfs_uart_driver,
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};
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#endif /* CONFIG_SERIAL_ETRAXFS_CONSOLE */
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static struct uart_driver etraxfs_uart_driver = {
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.owner = THIS_MODULE,
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.driver_name = "serial",
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.dev_name = "ttyS",
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.major = TTY_MAJOR,
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.minor = 64,
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.nr = UART_NR,
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#ifdef CONFIG_SERIAL_ETRAXFS_CONSOLE
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.cons = &cris_console,
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#endif /* CONFIG_SERIAL_ETRAXFS_CONSOLE */
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};
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static inline int crisv32_serial_get_rts(struct uart_cris_port *up)
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{
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void __iomem *regi_ser = up->regi_ser;
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/*
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* Return what the user has controlled rts to or
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* what the pin is? (if auto_rts is used it differs during tx)
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*/
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reg_ser_r_stat_din rstat = REG_RD(ser, regi_ser, r_stat_din);
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return !(rstat.rts_n == regk_ser_active);
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}
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/*
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* A set = 0 means 3.3V on the pin, bitvalue: 0=active, 1=inactive
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* 0=0V , 1=3.3V
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*/
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static inline void crisv32_serial_set_rts(struct uart_cris_port *up,
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int set, int force)
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{
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void __iomem *regi_ser = up->regi_ser;
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unsigned long flags;
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reg_ser_rw_rec_ctrl rec_ctrl;
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local_irq_save(flags);
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rec_ctrl = REG_RD(ser, regi_ser, rw_rec_ctrl);
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if (set)
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rec_ctrl.rts_n = regk_ser_active;
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else
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rec_ctrl.rts_n = regk_ser_inactive;
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REG_WR(ser, regi_ser, rw_rec_ctrl, rec_ctrl);
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local_irq_restore(flags);
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}
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static inline int crisv32_serial_get_cts(struct uart_cris_port *up)
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{
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void __iomem *regi_ser = up->regi_ser;
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reg_ser_r_stat_din rstat = REG_RD(ser, regi_ser, r_stat_din);
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return (rstat.cts_n == regk_ser_active);
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}
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/*
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* Send a single character for XON/XOFF purposes. We do it in this separate
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* function instead of the alternative support port.x_char, in the ...start_tx
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* function, so we don't mix up this case with possibly enabling transmission
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* of queued-up data (in case that's disabled after *receiving* an XOFF or
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* negative CTS). This function is used for both DMA and non-DMA case; see HW
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* docs specifically blessing sending characters manually when DMA for
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* transmission is enabled and running. We may be asked to transmit despite
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* the transmitter being disabled by a ..._stop_tx call so we need to enable
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* it temporarily but restore the state afterwards.
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*/
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static void etraxfs_uart_send_xchar(struct uart_port *port, char ch)
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{
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struct uart_cris_port *up = (struct uart_cris_port *)port;
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reg_ser_rw_dout dout = { .data = ch };
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reg_ser_rw_ack_intr ack_intr = { .tr_rdy = regk_ser_yes };
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reg_ser_r_stat_din rstat;
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reg_ser_rw_tr_ctrl prev_tr_ctrl, tr_ctrl;
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void __iomem *regi_ser = up->regi_ser;
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unsigned long flags;
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/*
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* Wait for tr_rdy in case a character is already being output. Make
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* sure we have integrity between the register reads and the writes
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* below, but don't busy-wait with interrupts off and the port lock
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* taken.
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*/
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spin_lock_irqsave(&port->lock, flags);
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do {
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spin_unlock_irqrestore(&port->lock, flags);
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spin_lock_irqsave(&port->lock, flags);
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prev_tr_ctrl = tr_ctrl = REG_RD(ser, regi_ser, rw_tr_ctrl);
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rstat = REG_RD(ser, regi_ser, r_stat_din);
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} while (!rstat.tr_rdy);
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/*
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* Ack an interrupt if one was just issued for the previous character
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* that was output. This is required for non-DMA as the interrupt is
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* used as the only indicator that the transmitter is ready and it
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* isn't while this x_char is being transmitted.
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*/
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REG_WR(ser, regi_ser, rw_ack_intr, ack_intr);
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/* Enable the transmitter in case it was disabled. */
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tr_ctrl.stop = 0;
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REG_WR(ser, regi_ser, rw_tr_ctrl, tr_ctrl);
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/*
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* Finally, send the blessed character; nothing should stop it now,
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* except for an xoff-detected state, which we'll handle below.
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*/
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REG_WR(ser, regi_ser, rw_dout, dout);
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up->port.icount.tx++;
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/* There might be an xoff state to clear. */
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rstat = REG_RD(ser, up->regi_ser, r_stat_din);
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/*
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* Clear any xoff state that *may* have been there to
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* inhibit transmission of the character.
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*/
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if (rstat.xoff_detect) {
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reg_ser_rw_xoff_clr xoff_clr = { .clr = 1 };
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reg_ser_rw_tr_dma_en tr_dma_en;
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REG_WR(ser, regi_ser, rw_xoff_clr, xoff_clr);
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tr_dma_en = REG_RD(ser, regi_ser, rw_tr_dma_en);
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/*
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* If we had an xoff state but cleared it, instead sneak in a
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* disabled state for the transmitter, after the character we
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* sent. Thus we keep the port disabled, just as if the xoff
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* state was still in effect (or actually, as if stop_tx had
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* been called, as we stop DMA too).
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*/
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prev_tr_ctrl.stop = 1;
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tr_dma_en.en = 0;
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REG_WR(ser, regi_ser, rw_tr_dma_en, tr_dma_en);
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}
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/* Restore "previous" enabled/disabled state of the transmitter. */
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REG_WR(ser, regi_ser, rw_tr_ctrl, prev_tr_ctrl);
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spin_unlock_irqrestore(&port->lock, flags);
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}
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/*
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* Do not spin_lock_irqsave or disable interrupts by other means here; it's
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* already done by the caller.
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*/
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static void etraxfs_uart_start_tx(struct uart_port *port)
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{
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struct uart_cris_port *up = (struct uart_cris_port *)port;
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/* we have already done below if a write is ongoing */
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if (up->write_ongoing)
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return;
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/* Signal that write is ongoing */
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up->write_ongoing = 1;
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etraxfs_uart_start_tx_bottom(port);
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}
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static inline void etraxfs_uart_start_tx_bottom(struct uart_port *port)
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{
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struct uart_cris_port *up = (struct uart_cris_port *)port;
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void __iomem *regi_ser = up->regi_ser;
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reg_ser_rw_tr_ctrl tr_ctrl;
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reg_ser_rw_intr_mask intr_mask;
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tr_ctrl = REG_RD(ser, regi_ser, rw_tr_ctrl);
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tr_ctrl.stop = regk_ser_no;
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REG_WR(ser, regi_ser, rw_tr_ctrl, tr_ctrl);
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intr_mask = REG_RD(ser, regi_ser, rw_intr_mask);
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intr_mask.tr_rdy = regk_ser_yes;
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REG_WR(ser, regi_ser, rw_intr_mask, intr_mask);
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}
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/*
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* This function handles both the DMA and non-DMA case by ordering the
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* transmitter to stop of after the current character. We don't need to wait
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* for any such character to be completely transmitted; we do that where it
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* matters, like in etraxfs_uart_set_termios. Don't busy-wait here; see
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* Documentation/serial/driver: this function is called within
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* spin_lock_irq{,save} and thus separate ones would be disastrous (when SMP).
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* There's no documented need to set the txd pin to any particular value;
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* break setting is controlled solely by etraxfs_uart_break_ctl.
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*/
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static void etraxfs_uart_stop_tx(struct uart_port *port)
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{
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struct uart_cris_port *up = (struct uart_cris_port *)port;
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void __iomem *regi_ser = up->regi_ser;
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reg_ser_rw_tr_ctrl tr_ctrl;
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reg_ser_rw_intr_mask intr_mask;
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reg_ser_rw_tr_dma_en tr_dma_en = {0};
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reg_ser_rw_xoff_clr xoff_clr = {0};
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/*
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* For the non-DMA case, we'd get a tr_rdy interrupt that we're not
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* interested in as we're not transmitting any characters. For the
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* DMA case, that interrupt is already turned off, but no reason to
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* waste code on conditionals here.
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*/
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intr_mask = REG_RD(ser, regi_ser, rw_intr_mask);
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intr_mask.tr_rdy = regk_ser_no;
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REG_WR(ser, regi_ser, rw_intr_mask, intr_mask);
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tr_ctrl = REG_RD(ser, regi_ser, rw_tr_ctrl);
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tr_ctrl.stop = 1;
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REG_WR(ser, regi_ser, rw_tr_ctrl, tr_ctrl);
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/*
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* Always clear possible hardware xoff-detected state here, no need to
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* unnecessary consider mctrl settings and when they change. We clear
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* it here rather than in start_tx: both functions are called as the
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* effect of XOFF processing, but start_tx is also called when upper
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* levels tell the driver that there are more characters to send, so
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* avoid adding code there.
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*/
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xoff_clr.clr = 1;
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REG_WR(ser, regi_ser, rw_xoff_clr, xoff_clr);
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/*
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* Disable transmitter DMA, so that if we're in XON/XOFF, we can send
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* those single characters without also giving go-ahead for queued up
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* DMA data.
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*/
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tr_dma_en.en = 0;
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REG_WR(ser, regi_ser, rw_tr_dma_en, tr_dma_en);
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/*
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* Make sure that write_ongoing is reset when stopping tx.
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*/
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up->write_ongoing = 0;
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}
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static void etraxfs_uart_stop_rx(struct uart_port *port)
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{
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struct uart_cris_port *up = (struct uart_cris_port *)port;
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void __iomem *regi_ser = up->regi_ser;
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reg_ser_rw_rec_ctrl rec_ctrl = REG_RD(ser, regi_ser, rw_rec_ctrl);
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rec_ctrl.en = regk_ser_no;
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REG_WR(ser, regi_ser, rw_rec_ctrl, rec_ctrl);
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}
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static void etraxfs_uart_enable_ms(struct uart_port *port)
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{
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}
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static void check_modem_status(struct uart_cris_port *up)
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{
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}
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static unsigned int etraxfs_uart_tx_empty(struct uart_port *port)
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{
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struct uart_cris_port *up = (struct uart_cris_port *)port;
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unsigned long flags;
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unsigned int ret;
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reg_ser_r_stat_din rstat = {0};
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spin_lock_irqsave(&up->port.lock, flags);
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rstat = REG_RD(ser, up->regi_ser, r_stat_din);
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ret = rstat.tr_empty ? TIOCSER_TEMT : 0;
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spin_unlock_irqrestore(&up->port.lock, flags);
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return ret;
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}
|
||||
static unsigned int etraxfs_uart_get_mctrl(struct uart_port *port)
|
||||
{
|
||||
struct uart_cris_port *up = (struct uart_cris_port *)port;
|
||||
unsigned int ret;
|
||||
|
||||
ret = 0;
|
||||
if (crisv32_serial_get_rts(up))
|
||||
ret |= TIOCM_RTS;
|
||||
/* DTR is active low */
|
||||
if (up->dtr_pin && !gpiod_get_raw_value(up->dtr_pin))
|
||||
ret |= TIOCM_DTR;
|
||||
/* CD is active low */
|
||||
if (up->cd_pin && !gpiod_get_raw_value(up->cd_pin))
|
||||
ret |= TIOCM_CD;
|
||||
/* RI is active low */
|
||||
if (up->ri_pin && !gpiod_get_raw_value(up->ri_pin))
|
||||
ret |= TIOCM_RI;
|
||||
/* DSR is active low */
|
||||
if (up->dsr_pin && !gpiod_get_raw_value(up->dsr_pin))
|
||||
ret |= TIOCM_DSR;
|
||||
if (crisv32_serial_get_cts(up))
|
||||
ret |= TIOCM_CTS;
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void etraxfs_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
|
||||
{
|
||||
struct uart_cris_port *up = (struct uart_cris_port *)port;
|
||||
|
||||
crisv32_serial_set_rts(up, mctrl & TIOCM_RTS ? 1 : 0, 0);
|
||||
/* DTR is active low */
|
||||
if (up->dtr_pin)
|
||||
gpiod_set_raw_value(up->dtr_pin, mctrl & TIOCM_DTR ? 0 : 1);
|
||||
/* RI is active low */
|
||||
if (up->ri_pin)
|
||||
gpiod_set_raw_value(up->ri_pin, mctrl & TIOCM_RNG ? 0 : 1);
|
||||
/* CD is active low */
|
||||
if (up->cd_pin)
|
||||
gpiod_set_raw_value(up->cd_pin, mctrl & TIOCM_CD ? 0 : 1);
|
||||
}
|
||||
|
||||
static void etraxfs_uart_break_ctl(struct uart_port *port, int break_state)
|
||||
{
|
||||
struct uart_cris_port *up = (struct uart_cris_port *)port;
|
||||
unsigned long flags;
|
||||
reg_ser_rw_tr_ctrl tr_ctrl;
|
||||
reg_ser_rw_tr_dma_en tr_dma_en;
|
||||
reg_ser_rw_intr_mask intr_mask;
|
||||
|
||||
spin_lock_irqsave(&up->port.lock, flags);
|
||||
tr_ctrl = REG_RD(ser, up->regi_ser, rw_tr_ctrl);
|
||||
tr_dma_en = REG_RD(ser, up->regi_ser, rw_tr_dma_en);
|
||||
intr_mask = REG_RD(ser, up->regi_ser, rw_intr_mask);
|
||||
|
||||
if (break_state != 0) { /* Send break */
|
||||
/*
|
||||
* We need to disable DMA (if used) or tr_rdy interrupts if no
|
||||
* DMA. No need to make this conditional on use of DMA;
|
||||
* disabling will be a no-op for the other mode.
|
||||
*/
|
||||
intr_mask.tr_rdy = regk_ser_no;
|
||||
tr_dma_en.en = 0;
|
||||
|
||||
/*
|
||||
* Stop transmission and set the txd pin to 0 after the
|
||||
* current character. The txd setting will take effect after
|
||||
* any current transmission has completed.
|
||||
*/
|
||||
tr_ctrl.stop = 1;
|
||||
tr_ctrl.txd = 0;
|
||||
} else {
|
||||
/* Re-enable the serial interrupt. */
|
||||
intr_mask.tr_rdy = regk_ser_yes;
|
||||
|
||||
tr_ctrl.stop = 0;
|
||||
tr_ctrl.txd = 1;
|
||||
}
|
||||
REG_WR(ser, up->regi_ser, rw_tr_ctrl, tr_ctrl);
|
||||
REG_WR(ser, up->regi_ser, rw_tr_dma_en, tr_dma_en);
|
||||
REG_WR(ser, up->regi_ser, rw_intr_mask, intr_mask);
|
||||
|
||||
spin_unlock_irqrestore(&up->port.lock, flags);
|
||||
}
|
||||
|
||||
static void
|
||||
transmit_chars_no_dma(struct uart_cris_port *up)
|
||||
{
|
||||
int max_count;
|
||||
struct circ_buf *xmit = &up->port.state->xmit;
|
||||
|
||||
void __iomem *regi_ser = up->regi_ser;
|
||||
reg_ser_r_stat_din rstat;
|
||||
reg_ser_rw_ack_intr ack_intr = { .tr_rdy = regk_ser_yes };
|
||||
|
||||
if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
|
||||
/* No more to send, so disable the interrupt. */
|
||||
reg_ser_rw_intr_mask intr_mask;
|
||||
|
||||
intr_mask = REG_RD(ser, regi_ser, rw_intr_mask);
|
||||
intr_mask.tr_rdy = 0;
|
||||
intr_mask.tr_empty = 0;
|
||||
REG_WR(ser, regi_ser, rw_intr_mask, intr_mask);
|
||||
up->write_ongoing = 0;
|
||||
return;
|
||||
}
|
||||
|
||||
/* If the serport is fast, we send up to max_count bytes before
|
||||
exiting the loop. */
|
||||
max_count = 64;
|
||||
do {
|
||||
reg_ser_rw_dout dout = { .data = xmit->buf[xmit->tail] };
|
||||
|
||||
REG_WR(ser, regi_ser, rw_dout, dout);
|
||||
REG_WR(ser, regi_ser, rw_ack_intr, ack_intr);
|
||||
xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE-1);
|
||||
up->port.icount.tx++;
|
||||
if (xmit->head == xmit->tail)
|
||||
break;
|
||||
rstat = REG_RD(ser, regi_ser, r_stat_din);
|
||||
} while ((--max_count > 0) && rstat.tr_rdy);
|
||||
|
||||
if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
|
||||
uart_write_wakeup(&up->port);
|
||||
}
|
||||
|
||||
static void receive_chars_no_dma(struct uart_cris_port *up)
|
||||
{
|
||||
reg_ser_rs_stat_din stat_din;
|
||||
reg_ser_r_stat_din rstat;
|
||||
struct tty_port *port;
|
||||
struct uart_icount *icount;
|
||||
int max_count = 16;
|
||||
char flag;
|
||||
reg_ser_rw_ack_intr ack_intr = { 0 };
|
||||
|
||||
rstat = REG_RD(ser, up->regi_ser, r_stat_din);
|
||||
icount = &up->port.icount;
|
||||
port = &up->port.state->port;
|
||||
|
||||
do {
|
||||
stat_din = REG_RD(ser, up->regi_ser, rs_stat_din);
|
||||
|
||||
flag = TTY_NORMAL;
|
||||
ack_intr.dav = 1;
|
||||
REG_WR(ser, up->regi_ser, rw_ack_intr, ack_intr);
|
||||
icount->rx++;
|
||||
|
||||
if (stat_din.framing_err | stat_din.par_err | stat_din.orun) {
|
||||
if (stat_din.data == 0x00 &&
|
||||
stat_din.framing_err) {
|
||||
/* Most likely a break. */
|
||||
flag = TTY_BREAK;
|
||||
icount->brk++;
|
||||
} else if (stat_din.par_err) {
|
||||
flag = TTY_PARITY;
|
||||
icount->parity++;
|
||||
} else if (stat_din.orun) {
|
||||
flag = TTY_OVERRUN;
|
||||
icount->overrun++;
|
||||
} else if (stat_din.framing_err) {
|
||||
flag = TTY_FRAME;
|
||||
icount->frame++;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* If this becomes important, we probably *could* handle this
|
||||
* gracefully by keeping track of the unhandled character.
|
||||
*/
|
||||
if (!tty_insert_flip_char(port, stat_din.data, flag))
|
||||
panic("%s: No tty buffer space", __func__);
|
||||
rstat = REG_RD(ser, up->regi_ser, r_stat_din);
|
||||
} while (rstat.dav && (max_count-- > 0));
|
||||
spin_unlock(&up->port.lock);
|
||||
tty_flip_buffer_push(port);
|
||||
spin_lock(&up->port.lock);
|
||||
}
|
||||
|
||||
static irqreturn_t
|
||||
ser_interrupt(int irq, void *dev_id)
|
||||
{
|
||||
struct uart_cris_port *up = (struct uart_cris_port *)dev_id;
|
||||
void __iomem *regi_ser;
|
||||
int handled = 0;
|
||||
|
||||
spin_lock(&up->port.lock);
|
||||
|
||||
regi_ser = up->regi_ser;
|
||||
|
||||
if (regi_ser) {
|
||||
reg_ser_r_masked_intr masked_intr;
|
||||
|
||||
masked_intr = REG_RD(ser, regi_ser, r_masked_intr);
|
||||
/*
|
||||
* Check what interrupts are active before taking
|
||||
* actions. If DMA is used the interrupt shouldn't
|
||||
* be enabled.
|
||||
*/
|
||||
if (masked_intr.dav) {
|
||||
receive_chars_no_dma(up);
|
||||
handled = 1;
|
||||
}
|
||||
check_modem_status(up);
|
||||
|
||||
if (masked_intr.tr_rdy) {
|
||||
transmit_chars_no_dma(up);
|
||||
handled = 1;
|
||||
}
|
||||
}
|
||||
spin_unlock(&up->port.lock);
|
||||
return IRQ_RETVAL(handled);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_CONSOLE_POLL
|
||||
static int etraxfs_uart_get_poll_char(struct uart_port *port)
|
||||
{
|
||||
reg_ser_rs_stat_din stat;
|
||||
reg_ser_rw_ack_intr ack_intr = { 0 };
|
||||
struct uart_cris_port *up = (struct uart_cris_port *)port;
|
||||
|
||||
do {
|
||||
stat = REG_RD(ser, up->regi_ser, rs_stat_din);
|
||||
} while (!stat.dav);
|
||||
|
||||
/* Ack the data_avail interrupt. */
|
||||
ack_intr.dav = 1;
|
||||
REG_WR(ser, up->regi_ser, rw_ack_intr, ack_intr);
|
||||
|
||||
return stat.data;
|
||||
}
|
||||
|
||||
static void etraxfs_uart_put_poll_char(struct uart_port *port,
|
||||
unsigned char c)
|
||||
{
|
||||
reg_ser_r_stat_din stat;
|
||||
struct uart_cris_port *up = (struct uart_cris_port *)port;
|
||||
|
||||
do {
|
||||
stat = REG_RD(ser, up->regi_ser, r_stat_din);
|
||||
} while (!stat.tr_rdy);
|
||||
REG_WR_INT(ser, up->regi_ser, rw_dout, c);
|
||||
}
|
||||
#endif /* CONFIG_CONSOLE_POLL */
|
||||
|
||||
static int etraxfs_uart_startup(struct uart_port *port)
|
||||
{
|
||||
struct uart_cris_port *up = (struct uart_cris_port *)port;
|
||||
unsigned long flags;
|
||||
reg_ser_rw_intr_mask ser_intr_mask = {0};
|
||||
|
||||
ser_intr_mask.dav = regk_ser_yes;
|
||||
|
||||
if (request_irq(etraxfs_uart_ports[port->line]->irq, ser_interrupt,
|
||||
0, DRV_NAME, etraxfs_uart_ports[port->line]))
|
||||
panic("irq ser%d", port->line);
|
||||
|
||||
spin_lock_irqsave(&up->port.lock, flags);
|
||||
|
||||
REG_WR(ser, up->regi_ser, rw_intr_mask, ser_intr_mask);
|
||||
|
||||
etraxfs_uart_set_mctrl(&up->port, up->port.mctrl);
|
||||
|
||||
spin_unlock_irqrestore(&up->port.lock, flags);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void etraxfs_uart_shutdown(struct uart_port *port)
|
||||
{
|
||||
struct uart_cris_port *up = (struct uart_cris_port *)port;
|
||||
unsigned long flags;
|
||||
|
||||
spin_lock_irqsave(&up->port.lock, flags);
|
||||
|
||||
etraxfs_uart_stop_tx(port);
|
||||
etraxfs_uart_stop_rx(port);
|
||||
|
||||
free_irq(etraxfs_uart_ports[port->line]->irq,
|
||||
etraxfs_uart_ports[port->line]);
|
||||
|
||||
etraxfs_uart_set_mctrl(&up->port, up->port.mctrl);
|
||||
|
||||
spin_unlock_irqrestore(&up->port.lock, flags);
|
||||
|
||||
}
|
||||
|
||||
static void
|
||||
etraxfs_uart_set_termios(struct uart_port *port, struct ktermios *termios,
|
||||
struct ktermios *old)
|
||||
{
|
||||
struct uart_cris_port *up = (struct uart_cris_port *)port;
|
||||
unsigned long flags;
|
||||
reg_ser_rw_xoff xoff;
|
||||
reg_ser_rw_xoff_clr xoff_clr = {0};
|
||||
reg_ser_rw_tr_ctrl tx_ctrl = {0};
|
||||
reg_ser_rw_tr_dma_en tx_dma_en = {0};
|
||||
reg_ser_rw_rec_ctrl rx_ctrl = {0};
|
||||
reg_ser_rw_tr_baud_div tx_baud_div = {0};
|
||||
reg_ser_rw_rec_baud_div rx_baud_div = {0};
|
||||
int baud;
|
||||
|
||||
if (old &&
|
||||
termios->c_cflag == old->c_cflag &&
|
||||
termios->c_iflag == old->c_iflag)
|
||||
return;
|
||||
|
||||
/* Tx: 8 bit, no/even parity, 1 stop bit, no cts. */
|
||||
tx_ctrl.base_freq = regk_ser_f29_493;
|
||||
tx_ctrl.en = 0;
|
||||
tx_ctrl.stop = 0;
|
||||
tx_ctrl.auto_rts = regk_ser_no;
|
||||
tx_ctrl.txd = 1;
|
||||
tx_ctrl.auto_cts = 0;
|
||||
/* Rx: 8 bit, no/even parity. */
|
||||
rx_ctrl.dma_err = regk_ser_stop;
|
||||
rx_ctrl.sampling = regk_ser_majority;
|
||||
rx_ctrl.timeout = 1;
|
||||
|
||||
rx_ctrl.rts_n = regk_ser_inactive;
|
||||
|
||||
/* Common for tx and rx: 8N1. */
|
||||
tx_ctrl.data_bits = regk_ser_bits8;
|
||||
rx_ctrl.data_bits = regk_ser_bits8;
|
||||
tx_ctrl.par = regk_ser_even;
|
||||
rx_ctrl.par = regk_ser_even;
|
||||
tx_ctrl.par_en = regk_ser_no;
|
||||
rx_ctrl.par_en = regk_ser_no;
|
||||
|
||||
tx_ctrl.stop_bits = regk_ser_bits1;
|
||||
|
||||
/*
|
||||
* Change baud-rate and write it to the hardware.
|
||||
*
|
||||
* baud_clock = base_freq / (divisor*8)
|
||||
* divisor = base_freq / (baud_clock * 8)
|
||||
* base_freq is either:
|
||||
* off, ext, 29.493MHz, 32.000 MHz, 32.768 MHz or 100 MHz
|
||||
* 20.493MHz is used for standard baudrates
|
||||
*/
|
||||
|
||||
/*
|
||||
* For the console port we keep the original baudrate here. Not very
|
||||
* beautiful.
|
||||
*/
|
||||
if ((port != console_port) || old)
|
||||
baud = uart_get_baud_rate(port, termios, old, 0,
|
||||
port->uartclk / 8);
|
||||
else
|
||||
baud = console_baud;
|
||||
|
||||
tx_baud_div.div = 29493000 / (8 * baud);
|
||||
/* Rx uses same as tx. */
|
||||
rx_baud_div.div = tx_baud_div.div;
|
||||
rx_ctrl.base_freq = tx_ctrl.base_freq;
|
||||
|
||||
if ((termios->c_cflag & CSIZE) == CS7) {
|
||||
/* Set 7 bit mode. */
|
||||
tx_ctrl.data_bits = regk_ser_bits7;
|
||||
rx_ctrl.data_bits = regk_ser_bits7;
|
||||
}
|
||||
|
||||
if (termios->c_cflag & CSTOPB) {
|
||||
/* Set 2 stop bit mode. */
|
||||
tx_ctrl.stop_bits = regk_ser_bits2;
|
||||
}
|
||||
|
||||
if (termios->c_cflag & PARENB) {
|
||||
/* Enable parity. */
|
||||
tx_ctrl.par_en = regk_ser_yes;
|
||||
rx_ctrl.par_en = regk_ser_yes;
|
||||
}
|
||||
|
||||
if (termios->c_cflag & CMSPAR) {
|
||||
if (termios->c_cflag & PARODD) {
|
||||
/* Set mark parity if PARODD and CMSPAR. */
|
||||
tx_ctrl.par = regk_ser_mark;
|
||||
rx_ctrl.par = regk_ser_mark;
|
||||
} else {
|
||||
tx_ctrl.par = regk_ser_space;
|
||||
rx_ctrl.par = regk_ser_space;
|
||||
}
|
||||
} else {
|
||||
if (termios->c_cflag & PARODD) {
|
||||
/* Set odd parity. */
|
||||
tx_ctrl.par = regk_ser_odd;
|
||||
rx_ctrl.par = regk_ser_odd;
|
||||
}
|
||||
}
|
||||
|
||||
if (termios->c_cflag & CRTSCTS) {
|
||||
/* Enable automatic CTS handling. */
|
||||
tx_ctrl.auto_cts = regk_ser_yes;
|
||||
}
|
||||
|
||||
/* Make sure the tx and rx are enabled. */
|
||||
tx_ctrl.en = regk_ser_yes;
|
||||
rx_ctrl.en = regk_ser_yes;
|
||||
|
||||
spin_lock_irqsave(&port->lock, flags);
|
||||
|
||||
tx_dma_en.en = 0;
|
||||
REG_WR(ser, up->regi_ser, rw_tr_dma_en, tx_dma_en);
|
||||
|
||||
/* Actually write the control regs (if modified) to the hardware. */
|
||||
uart_update_timeout(port, termios->c_cflag, port->uartclk/8);
|
||||
MODIFY_REG(up->regi_ser, rw_rec_baud_div, rx_baud_div);
|
||||
MODIFY_REG(up->regi_ser, rw_rec_ctrl, rx_ctrl);
|
||||
|
||||
MODIFY_REG(up->regi_ser, rw_tr_baud_div, tx_baud_div);
|
||||
MODIFY_REG(up->regi_ser, rw_tr_ctrl, tx_ctrl);
|
||||
|
||||
tx_dma_en.en = 0;
|
||||
REG_WR(ser, up->regi_ser, rw_tr_dma_en, tx_dma_en);
|
||||
|
||||
xoff = REG_RD(ser, up->regi_ser, rw_xoff);
|
||||
|
||||
if (up->port.state && up->port.state->port.tty &&
|
||||
(up->port.state->port.tty->termios.c_iflag & IXON)) {
|
||||
xoff.chr = STOP_CHAR(up->port.state->port.tty);
|
||||
xoff.automatic = regk_ser_yes;
|
||||
} else
|
||||
xoff.automatic = regk_ser_no;
|
||||
|
||||
MODIFY_REG(up->regi_ser, rw_xoff, xoff);
|
||||
|
||||
/*
|
||||
* Make sure we don't start in an automatically shut-off state due to
|
||||
* a previous early exit.
|
||||
*/
|
||||
xoff_clr.clr = 1;
|
||||
REG_WR(ser, up->regi_ser, rw_xoff_clr, xoff_clr);
|
||||
|
||||
etraxfs_uart_set_mctrl(&up->port, up->port.mctrl);
|
||||
spin_unlock_irqrestore(&up->port.lock, flags);
|
||||
}
|
||||
|
||||
static const char *
|
||||
etraxfs_uart_type(struct uart_port *port)
|
||||
{
|
||||
return "CRISv32";
|
||||
}
|
||||
|
||||
static void etraxfs_uart_release_port(struct uart_port *port)
|
||||
{
|
||||
}
|
||||
|
||||
static int etraxfs_uart_request_port(struct uart_port *port)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void etraxfs_uart_config_port(struct uart_port *port, int flags)
|
||||
{
|
||||
struct uart_cris_port *up = (struct uart_cris_port *)port;
|
||||
|
||||
up->port.type = PORT_CRIS;
|
||||
}
|
||||
|
||||
static const struct uart_ops etraxfs_uart_pops = {
|
||||
.tx_empty = etraxfs_uart_tx_empty,
|
||||
.set_mctrl = etraxfs_uart_set_mctrl,
|
||||
.get_mctrl = etraxfs_uart_get_mctrl,
|
||||
.stop_tx = etraxfs_uart_stop_tx,
|
||||
.start_tx = etraxfs_uart_start_tx,
|
||||
.send_xchar = etraxfs_uart_send_xchar,
|
||||
.stop_rx = etraxfs_uart_stop_rx,
|
||||
.enable_ms = etraxfs_uart_enable_ms,
|
||||
.break_ctl = etraxfs_uart_break_ctl,
|
||||
.startup = etraxfs_uart_startup,
|
||||
.shutdown = etraxfs_uart_shutdown,
|
||||
.set_termios = etraxfs_uart_set_termios,
|
||||
.type = etraxfs_uart_type,
|
||||
.release_port = etraxfs_uart_release_port,
|
||||
.request_port = etraxfs_uart_request_port,
|
||||
.config_port = etraxfs_uart_config_port,
|
||||
#ifdef CONFIG_CONSOLE_POLL
|
||||
.poll_get_char = etraxfs_uart_get_poll_char,
|
||||
.poll_put_char = etraxfs_uart_put_poll_char,
|
||||
#endif
|
||||
};
|
||||
|
||||
static void cris_serial_port_init(struct uart_port *port, int line)
|
||||
{
|
||||
struct uart_cris_port *up = (struct uart_cris_port *)port;
|
||||
|
||||
if (up->initialized)
|
||||
return;
|
||||
up->initialized = 1;
|
||||
port->line = line;
|
||||
spin_lock_init(&port->lock);
|
||||
port->ops = &etraxfs_uart_pops;
|
||||
port->irq = up->irq;
|
||||
port->iobase = (unsigned long) up->regi_ser;
|
||||
port->uartclk = 29493000;
|
||||
|
||||
/*
|
||||
* We can't fit any more than 255 here (unsigned char), though
|
||||
* actually UART_XMIT_SIZE characters could be pending output.
|
||||
* At time of this writing, the definition of "fifosize" is here the
|
||||
* amount of characters that can be pending output after a start_tx call
|
||||
* until tx_empty returns 1: see serial_core.c:uart_wait_until_sent.
|
||||
* This matters for timeout calculations unfortunately, but keeping
|
||||
* larger amounts at the DMA wouldn't win much so let's just play nice.
|
||||
*/
|
||||
port->fifosize = 255;
|
||||
port->flags = UPF_BOOT_AUTOCONF;
|
||||
}
|
||||
|
||||
static int etraxfs_uart_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct device_node *np = pdev->dev.of_node;
|
||||
struct uart_cris_port *up;
|
||||
int dev_id;
|
||||
|
||||
if (!np)
|
||||
return -ENODEV;
|
||||
|
||||
dev_id = of_alias_get_id(np, "serial");
|
||||
if (dev_id < 0)
|
||||
dev_id = 0;
|
||||
|
||||
if (dev_id >= UART_NR)
|
||||
return -EINVAL;
|
||||
|
||||
if (etraxfs_uart_ports[dev_id])
|
||||
return -EBUSY;
|
||||
|
||||
up = devm_kzalloc(&pdev->dev, sizeof(struct uart_cris_port),
|
||||
GFP_KERNEL);
|
||||
if (!up)
|
||||
return -ENOMEM;
|
||||
|
||||
up->irq = irq_of_parse_and_map(np, 0);
|
||||
up->regi_ser = of_iomap(np, 0);
|
||||
up->dtr_pin = devm_gpiod_get_optional(&pdev->dev, "dtr");
|
||||
up->dsr_pin = devm_gpiod_get_optional(&pdev->dev, "dsr");
|
||||
up->ri_pin = devm_gpiod_get_optional(&pdev->dev, "ri");
|
||||
up->cd_pin = devm_gpiod_get_optional(&pdev->dev, "cd");
|
||||
up->port.dev = &pdev->dev;
|
||||
cris_serial_port_init(&up->port, dev_id);
|
||||
|
||||
etraxfs_uart_ports[dev_id] = up;
|
||||
platform_set_drvdata(pdev, &up->port);
|
||||
uart_add_one_port(&etraxfs_uart_driver, &up->port);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int etraxfs_uart_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct uart_port *port;
|
||||
|
||||
port = platform_get_drvdata(pdev);
|
||||
uart_remove_one_port(&etraxfs_uart_driver, port);
|
||||
etraxfs_uart_ports[pdev->id] = NULL;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct of_device_id etraxfs_uart_dt_ids[] = {
|
||||
{ .compatible = "axis,etraxfs-uart" },
|
||||
{ /* sentinel */ }
|
||||
};
|
||||
|
||||
MODULE_DEVICE_TABLE(of, etraxfs_uart_dt_ids);
|
||||
|
||||
static struct platform_driver etraxfs_uart_platform_driver = {
|
||||
.driver = {
|
||||
.name = DRV_NAME,
|
||||
.of_match_table = of_match_ptr(etraxfs_uart_dt_ids),
|
||||
},
|
||||
.probe = etraxfs_uart_probe,
|
||||
.remove = etraxfs_uart_remove,
|
||||
};
|
||||
|
||||
static int __init etraxfs_uart_init(void)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = uart_register_driver(&etraxfs_uart_driver);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = platform_driver_register(&etraxfs_uart_platform_driver);
|
||||
if (ret)
|
||||
uart_unregister_driver(&etraxfs_uart_driver);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void __exit etraxfs_uart_exit(void)
|
||||
{
|
||||
platform_driver_unregister(&etraxfs_uart_platform_driver);
|
||||
uart_unregister_driver(&etraxfs_uart_driver);
|
||||
}
|
||||
|
||||
module_init(etraxfs_uart_init);
|
||||
module_exit(etraxfs_uart_exit);
|
||||
@ -255,4 +255,7 @@
|
||||
/* SPRD SERIAL */
|
||||
#define PORT_SPRD 111
|
||||
|
||||
/* Cris v10 / v32 SoC */
|
||||
#define PORT_CRIS 112
|
||||
|
||||
#endif /* _UAPILINUX_SERIAL_CORE_H */
|
||||
|
||||
Loading…
Reference in New Issue
Block a user