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drm/i915: check the power down well on assert_pipe()

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If the power well is disabled, we should not try to read its
registers, otherwise we'll get "unclaimed register" messages.

V2: Don't check whether the power well is enabled or not, just check
whether we asked it to be enabled or not: if we asked to disable the
power well, don't use the registers on it, even if it's still enabled.

V3: Fix bug that breaks all non-Haswell machines.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Paulo Zanoni 2013-01-29 16:35:19 -02:00 committed by Daniel Vetter
parent 10aa17c86f
commit 693101618a
1 changed files with 9 additions and 3 deletions
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12
drivers/gpu/drm/i915/intel_display.c
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@ -1214,9 +1214,15 @@ void assert_pipe(struct drm_i915_private *dev_priv,
if (pipe == PIPE_A && dev_priv->quirks & QUIRK_PIPEA_FORCE) if (pipe == PIPE_A && dev_priv->quirks & QUIRK_PIPEA_FORCE)
state = true; state = true;
reg = PIPECONF(cpu_transcoder); if (IS_HASWELL(dev_priv->dev) && cpu_transcoder != TRANSCODER_EDP &&
val = I915_READ(reg); !(I915_READ(HSW_PWR_WELL_DRIVER) & HSW_PWR_WELL_ENABLE)) {
cur_state = !!(val & PIPECONF_ENABLE); cur_state = false;
} else {
reg = PIPECONF(cpu_transcoder);
val = I915_READ(reg);
cur_state = !!(val & PIPECONF_ENABLE);
}
WARN(cur_state != state, WARN(cur_state != state,
"pipe %c assertion failure (expected %s, current %s)\n", "pipe %c assertion failure (expected %s, current %s)\n",
pipe_name(pipe), state_string(state), state_string(cur_state)); pipe_name(pipe), state_string(state), state_string(cur_state));