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soc: actions: owl-sps: Factor out owl_sps_set_pg() for power-gating
Allow the SMP code to reuse PM domain code for CPU2/CPU3 wakeup. Signed-off-by: Andreas Färber <afaerber@suse.de>
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@ -1,8 +1,12 @@
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if ARCH_ACTIONS || COMPILE_TEST
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config OWL_PM_DOMAINS_HELPER
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bool
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config OWL_PM_DOMAINS
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bool "Actions Semi SPS power domains"
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depends on PM
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select OWL_PM_DOMAINS_HELPER
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select PM_GENERIC_DOMAINS
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help
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Say 'y' here to enable support for Smart Power System (SPS)
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@ -1 +1,2 @@
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obj-$(CONFIG_OWL_PM_DOMAINS_HELPER) += owl-sps-helper.o
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obj-$(CONFIG_OWL_PM_DOMAINS) += owl-sps.o
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51
drivers/soc/actions/owl-sps-helper.c
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51
drivers/soc/actions/owl-sps-helper.c
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@ -0,0 +1,51 @@
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/*
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* Actions Semi Owl Smart Power System (SPS) shared helpers
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*
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* Copyright 2012 Actions Semi Inc.
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* Author: Actions Semi, Inc.
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*
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* Copyright (c) 2017 Andreas Färber
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/delay.h>
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#include <linux/io.h>
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#define OWL_SPS_PG_CTL 0x0
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int owl_sps_set_pg(void __iomem *base, u32 pwr_mask, u32 ack_mask, bool enable)
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{
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u32 val;
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bool ack;
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int timeout;
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val = readl(base + OWL_SPS_PG_CTL);
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ack = val & ack_mask;
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if (ack == enable)
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return 0;
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if (enable)
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val |= pwr_mask;
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else
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val &= ~pwr_mask;
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writel(val, base + OWL_SPS_PG_CTL);
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for (timeout = 5000; timeout > 0; timeout -= 50) {
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val = readl(base + OWL_SPS_PG_CTL);
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if ((val & ack_mask) == (enable ? ack_mask : 0))
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break;
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udelay(50);
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}
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if (timeout <= 0)
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return -ETIMEDOUT;
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udelay(10);
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return 0;
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}
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EXPORT_SYMBOL_GPL(owl_sps_set_pg);
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@ -12,15 +12,12 @@
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* option) any later version.
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*/
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#include <linux/delay.h>
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#include <linux/io.h>
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#include <linux/of_address.h>
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#include <linux/of_platform.h>
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#include <linux/pm_domain.h>
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#include <linux/soc/actions/owl-sps.h>
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#include <dt-bindings/power/owl-s500-powergate.h>
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#define OWL_SPS_PG_CTL 0x0
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struct owl_sps_domain_info {
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const char *name;
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int pwr_bit;
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@ -51,37 +48,12 @@ struct owl_sps_domain {
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static int owl_sps_set_power(struct owl_sps_domain *pd, bool enable)
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{
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u32 val, pwr_mask, ack_mask;
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int timeout;
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bool ack;
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u32 pwr_mask, ack_mask;
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ack_mask = BIT(pd->info->ack_bit);
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pwr_mask = BIT(pd->info->pwr_bit);
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val = readl(pd->sps->base + OWL_SPS_PG_CTL);
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ack = val & ack_mask;
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if (ack == enable)
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return 0;
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if (enable)
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val |= pwr_mask;
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else
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val &= ~pwr_mask;
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writel(val, pd->sps->base + OWL_SPS_PG_CTL);
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for (timeout = 5000; timeout > 0; timeout -= 50) {
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val = readl(pd->sps->base + OWL_SPS_PG_CTL);
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if ((val & ack_mask) == (enable ? ack_mask : 0))
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break;
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udelay(50);
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}
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if (timeout <= 0)
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return -ETIMEDOUT;
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udelay(10);
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return 0;
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return owl_sps_set_pg(pd->sps->base, pwr_mask, ack_mask, enable);
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}
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static int owl_sps_power_on(struct generic_pm_domain *domain)
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11
include/linux/soc/actions/owl-sps.h
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11
include/linux/soc/actions/owl-sps.h
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@ -0,0 +1,11 @@
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/*
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* Copyright (c) 2017 Andreas Färber
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef SOC_ACTIONS_OWL_SPS_H
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#define SOC_ACTIONS_OWL_SPS_H
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int owl_sps_set_pg(void __iomem *base, u32 pwr_mask, u32 ack_mask, bool enable);
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#endif
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