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drm/radeon: make ib size variable
This avoid to waste ib pool size and avoid a bunch of wait for previous ib to finish. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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@ -3708,7 +3708,7 @@ int r100_ib_test(struct radeon_device *rdev)
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return r;
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}
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WREG32(scratch, 0xCAFEDEAD);
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r = radeon_ib_get(rdev, RADEON_RING_TYPE_GFX_INDEX, &ib);
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r = radeon_ib_get(rdev, RADEON_RING_TYPE_GFX_INDEX, &ib, 256);
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if (r) {
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return r;
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}
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@ -2711,7 +2711,7 @@ int r600_ib_test(struct radeon_device *rdev, int ring)
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return r;
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}
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WREG32(scratch, 0xCAFEDEAD);
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r = radeon_ib_get(rdev, ring, &ib);
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r = radeon_ib_get(rdev, ring, &ib, 256);
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if (r) {
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DRM_ERROR("radeon: failed to get ib (%d).\n", r);
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return r;
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@ -619,16 +619,17 @@ void r600_blit_fini(struct radeon_device *rdev)
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radeon_bo_unref(&rdev->r600_blit.shader_obj);
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}
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static int r600_vb_ib_get(struct radeon_device *rdev)
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static int r600_vb_ib_get(struct radeon_device *rdev, unsigned size)
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{
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int r;
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r = radeon_ib_get(rdev, RADEON_RING_TYPE_GFX_INDEX, &rdev->r600_blit.vb_ib);
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r = radeon_ib_get(rdev, RADEON_RING_TYPE_GFX_INDEX,
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&rdev->r600_blit.vb_ib, size);
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if (r) {
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DRM_ERROR("failed to get IB for vertex buffer\n");
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return r;
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}
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rdev->r600_blit.vb_total = 64*1024;
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rdev->r600_blit.vb_total = size;
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rdev->r600_blit.vb_used = 0;
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return 0;
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}
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@ -693,10 +694,6 @@ int r600_blit_prepare_copy(struct radeon_device *rdev, unsigned num_gpu_pages)
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int num_loops = 0;
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int dwords_per_loop = rdev->r600_blit.ring_size_per_loop;
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r = r600_vb_ib_get(rdev);
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if (r)
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return r;
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/* num loops */
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while (num_gpu_pages) {
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num_gpu_pages -=
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@ -705,6 +702,11 @@ int r600_blit_prepare_copy(struct radeon_device *rdev, unsigned num_gpu_pages)
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num_loops++;
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}
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/* 48 bytes for vertex per loop */
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r = r600_vb_ib_get(rdev, (num_loops*48)+256);
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if (r)
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return r;
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/* calculate number of loops correctly */
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ring_size = num_loops * dwords_per_loop;
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ring_size += rdev->r600_blit.ring_size_common;
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@ -638,7 +638,8 @@ struct r600_blit {
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void r600_blit_suspend(struct radeon_device *rdev);
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int radeon_ib_get(struct radeon_device *rdev, int ring, struct radeon_ib **ib);
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int radeon_ib_get(struct radeon_device *rdev, int ring,
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struct radeon_ib **ib, unsigned size);
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void radeon_ib_free(struct radeon_device *rdev, struct radeon_ib **ib);
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int radeon_ib_schedule(struct radeon_device *rdev, struct radeon_ib *ib);
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int radeon_ib_pool_init(struct radeon_device *rdev);
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@ -246,7 +246,9 @@ int radeon_cs_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
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radeon_mutex_unlock(&rdev->cs_mutex);
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return r;
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}
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r = radeon_ib_get(rdev, RADEON_RING_TYPE_GFX_INDEX, &parser.ib);
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ib_chunk = &parser.chunks[parser.chunk_ib_idx];
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r = radeon_ib_get(rdev, RADEON_RING_TYPE_GFX_INDEX, &parser.ib,
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ib_chunk->length_dw * 4);
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if (r) {
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DRM_ERROR("Failed to get ib !\n");
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radeon_cs_parser_fini(&parser, r);
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@ -264,7 +266,6 @@ int radeon_cs_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
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/* Copy the packet into the IB, the parser will read from the
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* input memory (cached) and write to the IB (which can be
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* uncached). */
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ib_chunk = &parser.chunks[parser.chunk_ib_idx];
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parser.ib->length_dw = ib_chunk->length_dw;
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r = radeon_cs_parse(&parser);
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if (r || parser.parser_error) {
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@ -93,13 +93,16 @@ static bool radeon_ib_try_free(struct radeon_device *rdev,
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return done;
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}
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int radeon_ib_get(struct radeon_device *rdev, int ring, struct radeon_ib **ib)
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int radeon_ib_get(struct radeon_device *rdev, int ring,
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struct radeon_ib **ib, unsigned size)
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{
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struct radeon_fence *fence;
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unsigned cretry = 0;
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int r = 0, i, idx;
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*ib = NULL;
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/* align size on 256 bytes */
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size = ALIGN(size, 256);
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r = radeon_fence_create(rdev, &fence, ring);
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if (r) {
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@ -122,7 +125,7 @@ retry:
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if (rdev->ib_pool.ibs[idx].fence == NULL) {
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r = radeon_sa_bo_new(rdev, &rdev->ib_pool.sa_manager,
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&rdev->ib_pool.ibs[idx].sa_bo,
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64*1024, 64);
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size, 256);
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if (!r) {
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*ib = &rdev->ib_pool.ibs[idx];
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(*ib)->ptr = rdev->ib_pool.sa_manager.cpu_ptr;
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