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iio: adc: meson-saradc: improve meson_sar_adc_read_raw_sample
After sampling there should always be only one value in the FIFO. This also applies to averaging mode as the averaging is done chip-internally. So we don't have to loop and let the driver complain if there's not exactly one value in the FIFO. If the value belongs to a different channel then don't silently swallow the value but complain. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
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@ -278,33 +278,31 @@ static int meson_sar_adc_read_raw_sample(struct iio_dev *indio_dev,
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int *val)
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{
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struct meson_sar_adc_priv *priv = iio_priv(indio_dev);
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int regval, fifo_chan, fifo_val, sum = 0, count = 0;
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int regval, fifo_chan, fifo_val, count;
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if(!wait_for_completion_timeout(&priv->done,
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msecs_to_jiffies(MESON_SAR_ADC_TIMEOUT)))
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return -ETIMEDOUT;
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while (meson_sar_adc_get_fifo_count(indio_dev) > 0 &&
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count < MESON_SAR_ADC_MAX_FIFO_SIZE) {
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regmap_read(priv->regmap, MESON_SAR_ADC_FIFO_RD, ®val);
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fifo_chan = FIELD_GET(MESON_SAR_ADC_FIFO_RD_CHAN_ID_MASK,
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regval);
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if (fifo_chan != chan->channel)
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continue;
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fifo_val = FIELD_GET(MESON_SAR_ADC_FIFO_RD_SAMPLE_VALUE_MASK,
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regval);
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fifo_val &= (BIT(priv->data->resolution) - 1);
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sum += fifo_val;
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count++;
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count = meson_sar_adc_get_fifo_count(indio_dev);
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if (count != 1) {
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dev_err(&indio_dev->dev,
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"ADC FIFO has %d element(s) instead of one\n", count);
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return -EINVAL;
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}
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if (!count)
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return -ENOENT;
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regmap_read(priv->regmap, MESON_SAR_ADC_FIFO_RD, ®val);
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fifo_chan = FIELD_GET(MESON_SAR_ADC_FIFO_RD_CHAN_ID_MASK, regval);
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if (fifo_chan != chan->channel) {
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dev_err(&indio_dev->dev,
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"ADC FIFO entry belongs to channel %d instead of %d\n",
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fifo_chan, chan->channel);
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return -EINVAL;
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}
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*val = sum / count;
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fifo_val = FIELD_GET(MESON_SAR_ADC_FIFO_RD_SAMPLE_VALUE_MASK, regval);
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fifo_val &= GENMASK(priv->data->resolution - 1, 0);
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*val = fifo_val;
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return 0;
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}
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