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https://github.com/FEX-Emu/linux.git
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[PATCH] clocksource init adjustments (fix bug #7426)
This patch resolves the issue found here: http://bugme.osdl.org/show_bug.cgi?id=7426 The basic summary is: Currently we register most of i386/x86_64 clocksources at module_init time. Then we enable clocksource selection at late_initcall time. This causes some problems for drivers that use gettimeofday for init calibration routines (specifically the es1968 driver in this case), where durring module_init, the only clocksource available is the low-res jiffies clocksource. This may cause slight calibration errors, due to the small sampling time used. It should be noted that drivers that require fine grained time may not function on architectures that do not have better then jiffies resolution timekeeping (there are a few). However, this does not discount the reasonable need for such fine-grained timekeeping at init time. Thus the solution here is to register clocksources earlier (ideally when the hardware is being initialized), and then we enable clocksource selection at fs_initcall (before device_initcall). This patch should probably get some testing time in -mm, since clocksource selection is one of the most important issues for correct timekeeping, and I've only been able to test this on a few of my own boxes. Signed-off-by: John Stultz <johnstul@us.ibm.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@elte.hu> Cc: "David S. Miller" <davem@davemloft.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
parent
4540768011
commit
6bb74df481
@ -200,6 +200,23 @@ static int hpet_next_event(unsigned long delta,
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return ((long)(hpet_readl(HPET_COUNTER) - cnt ) > 0);
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}
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/*
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* Clock source related code
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*/
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static cycle_t read_hpet(void)
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{
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return (cycle_t)hpet_readl(HPET_COUNTER);
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}
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static struct clocksource clocksource_hpet = {
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.name = "hpet",
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.rating = 250,
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.read = read_hpet,
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.mask = HPET_MASK,
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.shift = HPET_SHIFT,
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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};
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/*
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* Try to setup the HPET timer
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*/
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@ -207,6 +224,7 @@ int __init hpet_enable(void)
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{
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unsigned long id;
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uint64_t hpet_freq;
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u64 tmp;
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if (!is_hpet_capable())
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return 0;
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@ -253,6 +271,25 @@ int __init hpet_enable(void)
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/* Start the counter */
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hpet_start_counter();
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/* Initialize and register HPET clocksource
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*
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* hpet period is in femto seconds per cycle
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* so we need to convert this to ns/cyc units
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* aproximated by mult/2^shift
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*
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* fsec/cyc * 1nsec/1000000fsec = nsec/cyc = mult/2^shift
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* fsec/cyc * 1ns/1000000fsec * 2^shift = mult
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* fsec/cyc * 2^shift * 1nsec/1000000fsec = mult
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* (fsec/cyc << shift)/1000000 = mult
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* (hpet_period << shift)/FSEC_PER_NSEC = mult
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*/
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tmp = (u64)hpet_period << HPET_SHIFT;
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do_div(tmp, FSEC_PER_NSEC);
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clocksource_hpet.mult = (u32)tmp;
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clocksource_register(&clocksource_hpet);
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if (id & HPET_ID_LEGSUP) {
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hpet_enable_int();
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hpet_reserve_platform_timers(id);
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@ -273,49 +310,6 @@ out_nohpet:
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return 0;
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}
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/*
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* Clock source related code
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*/
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static cycle_t read_hpet(void)
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{
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return (cycle_t)hpet_readl(HPET_COUNTER);
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}
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static struct clocksource clocksource_hpet = {
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.name = "hpet",
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.rating = 250,
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.read = read_hpet,
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.mask = HPET_MASK,
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.shift = HPET_SHIFT,
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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};
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static int __init init_hpet_clocksource(void)
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{
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u64 tmp;
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if (!hpet_virt_address)
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return -ENODEV;
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/*
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* hpet period is in femto seconds per cycle
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* so we need to convert this to ns/cyc units
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* aproximated by mult/2^shift
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*
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* fsec/cyc * 1nsec/1000000fsec = nsec/cyc = mult/2^shift
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* fsec/cyc * 1ns/1000000fsec * 2^shift = mult
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* fsec/cyc * 2^shift * 1nsec/1000000fsec = mult
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* (fsec/cyc << shift)/1000000 = mult
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* (hpet_period << shift)/FSEC_PER_NSEC = mult
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*/
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tmp = (u64)hpet_period << HPET_SHIFT;
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do_div(tmp, FSEC_PER_NSEC);
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clocksource_hpet.mult = (u32)tmp;
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return clocksource_register(&clocksource_hpet);
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}
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module_init(init_hpet_clocksource);
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#ifdef CONFIG_HPET_EMULATE_RTC
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@ -195,4 +195,4 @@ static int __init init_pit_clocksource(void)
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clocksource_pit.mult = clocksource_hz2mult(CLOCK_TICK_RATE, 20);
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return clocksource_register(&clocksource_pit);
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}
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module_init(init_pit_clocksource);
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arch_initcall(init_pit_clocksource);
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@ -657,5 +657,4 @@ void __init setup_arch(char **cmdline_p)
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conswitchp = &dummy_con;
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#endif
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#endif
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tsc_init();
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}
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@ -279,5 +279,6 @@ void __init hpet_time_init(void)
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*/
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void __init time_init(void)
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{
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tsc_init();
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late_time_init = choose_time_init();
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}
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@ -184,34 +184,6 @@ int recalibrate_cpu_khz(void)
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EXPORT_SYMBOL(recalibrate_cpu_khz);
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void __init tsc_init(void)
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{
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if (!cpu_has_tsc || tsc_disable)
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goto out_no_tsc;
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cpu_khz = calculate_cpu_khz();
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tsc_khz = cpu_khz;
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if (!cpu_khz)
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goto out_no_tsc;
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printk("Detected %lu.%03lu MHz processor.\n",
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(unsigned long)cpu_khz / 1000,
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(unsigned long)cpu_khz % 1000);
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set_cyc2ns_scale(cpu_khz);
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use_tsc_delay();
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return;
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out_no_tsc:
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/*
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* Set the tsc_disable flag if there's no TSC support, this
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* makes it a fast flag for the kernel to see whether it
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* should be using the TSC.
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*/
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tsc_disable = 1;
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}
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#ifdef CONFIG_CPU_FREQ
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/*
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@ -381,28 +353,47 @@ static void __init check_geode_tsc_reliable(void)
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static inline void check_geode_tsc_reliable(void) { }
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#endif
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static int __init init_tsc_clocksource(void)
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void __init tsc_init(void)
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{
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if (!cpu_has_tsc || tsc_disable)
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goto out_no_tsc;
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if (cpu_has_tsc && tsc_khz && !tsc_disable) {
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/* check blacklist */
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dmi_check_system(bad_tsc_dmi_table);
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cpu_khz = calculate_cpu_khz();
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tsc_khz = cpu_khz;
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unsynchronized_tsc();
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check_geode_tsc_reliable();
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current_tsc_khz = tsc_khz;
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clocksource_tsc.mult = clocksource_khz2mult(current_tsc_khz,
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if (!cpu_khz)
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goto out_no_tsc;
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printk("Detected %lu.%03lu MHz processor.\n",
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(unsigned long)cpu_khz / 1000,
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(unsigned long)cpu_khz % 1000);
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set_cyc2ns_scale(cpu_khz);
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use_tsc_delay();
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/* Check and install the TSC clocksource */
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dmi_check_system(bad_tsc_dmi_table);
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unsynchronized_tsc();
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check_geode_tsc_reliable();
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current_tsc_khz = tsc_khz;
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clocksource_tsc.mult = clocksource_khz2mult(current_tsc_khz,
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clocksource_tsc.shift);
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/* lower the rating if we already know its unstable: */
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if (check_tsc_unstable()) {
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clocksource_tsc.rating = 0;
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clocksource_tsc.flags &= ~CLOCK_SOURCE_IS_CONTINUOUS;
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}
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return clocksource_register(&clocksource_tsc);
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/* lower the rating if we already know its unstable: */
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if (check_tsc_unstable()) {
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clocksource_tsc.rating = 0;
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clocksource_tsc.flags &= ~CLOCK_SOURCE_IS_CONTINUOUS;
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}
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clocksource_register(&clocksource_tsc);
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return 0;
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return;
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out_no_tsc:
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/*
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* Set the tsc_disable flag if there's no TSC support, this
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* makes it a fast flag for the kernel to see whether it
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* should be using the TSC.
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*/
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tsc_disable = 1;
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}
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module_init(init_tsc_clocksource);
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@ -12,6 +12,12 @@
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#include <asm/timex.h>
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#include <asm/hpet.h>
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#define HPET_MASK 0xFFFFFFFF
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#define HPET_SHIFT 22
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/* FSEC = 10^-15 NSEC = 10^-9 */
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#define FSEC_PER_NSEC 1000000
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int nohpet __initdata;
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unsigned long hpet_address;
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@ -106,9 +112,31 @@ int hpet_timer_stop_set_go(unsigned long tick)
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return 0;
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}
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static cycle_t read_hpet(void)
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{
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return (cycle_t)hpet_readl(HPET_COUNTER);
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}
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static cycle_t __vsyscall_fn vread_hpet(void)
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{
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return readl((void __iomem *)fix_to_virt(VSYSCALL_HPET) + 0xf0);
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}
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struct clocksource clocksource_hpet = {
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.name = "hpet",
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.rating = 250,
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.read = read_hpet,
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.mask = (cycle_t)HPET_MASK,
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.mult = 0, /* set below */
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.shift = HPET_SHIFT,
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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.vread = vread_hpet,
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};
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int hpet_arch_init(void)
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{
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unsigned int id;
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u64 tmp;
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if (!hpet_address)
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return -1;
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@ -132,6 +160,22 @@ int hpet_arch_init(void)
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hpet_use_timer = (id & HPET_ID_LEGSUP);
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/*
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* hpet period is in femto seconds per cycle
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* so we need to convert this to ns/cyc units
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* aproximated by mult/2^shift
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*
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* fsec/cyc * 1nsec/1000000fsec = nsec/cyc = mult/2^shift
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* fsec/cyc * 1ns/1000000fsec * 2^shift = mult
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* fsec/cyc * 2^shift * 1nsec/1000000fsec = mult
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* (fsec/cyc << shift)/1000000 = mult
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* (hpet_period << shift)/FSEC_PER_NSEC = mult
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*/
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tmp = (u64)hpet_period << HPET_SHIFT;
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do_div(tmp, FSEC_PER_NSEC);
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clocksource_hpet.mult = (u32)tmp;
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clocksource_register(&clocksource_hpet);
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return hpet_timer_stop_set_go(hpet_tick);
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}
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@ -444,68 +488,3 @@ static int __init nohpet_setup(char *s)
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}
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__setup("nohpet", nohpet_setup);
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#define HPET_MASK 0xFFFFFFFF
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#define HPET_SHIFT 22
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/* FSEC = 10^-15 NSEC = 10^-9 */
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#define FSEC_PER_NSEC 1000000
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static void *hpet_ptr;
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static cycle_t read_hpet(void)
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{
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return (cycle_t)readl(hpet_ptr);
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}
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static cycle_t __vsyscall_fn vread_hpet(void)
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{
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return readl((void __iomem *)fix_to_virt(VSYSCALL_HPET) + 0xf0);
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}
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struct clocksource clocksource_hpet = {
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.name = "hpet",
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.rating = 250,
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.read = read_hpet,
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.mask = (cycle_t)HPET_MASK,
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.mult = 0, /* set below */
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.shift = HPET_SHIFT,
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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.vread = vread_hpet,
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};
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static int __init init_hpet_clocksource(void)
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{
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unsigned long hpet_period;
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void __iomem *hpet_base;
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u64 tmp;
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if (!hpet_address)
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return -ENODEV;
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/* calculate the hpet address: */
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hpet_base = ioremap_nocache(hpet_address, HPET_MMAP_SIZE);
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hpet_ptr = hpet_base + HPET_COUNTER;
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/* calculate the frequency: */
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hpet_period = readl(hpet_base + HPET_PERIOD);
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/*
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* hpet period is in femto seconds per cycle
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* so we need to convert this to ns/cyc units
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* aproximated by mult/2^shift
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*
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* fsec/cyc * 1nsec/1000000fsec = nsec/cyc = mult/2^shift
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* fsec/cyc * 1ns/1000000fsec * 2^shift = mult
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* fsec/cyc * 2^shift * 1nsec/1000000fsec = mult
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* (fsec/cyc << shift)/1000000 = mult
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* (hpet_period << shift)/FSEC_PER_NSEC = mult
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*/
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tmp = (u64)hpet_period << HPET_SHIFT;
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do_div(tmp, FSEC_PER_NSEC);
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clocksource_hpet.mult = (u32)tmp;
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return clocksource_register(&clocksource_hpet);
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}
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module_init(init_hpet_clocksource);
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@ -358,6 +358,8 @@ void __init time_init(void)
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set_cyc2ns_scale(cpu_khz);
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printk(KERN_INFO "time.c: Detected %d.%03d MHz processor.\n",
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cpu_khz / 1000, cpu_khz % 1000);
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init_tsc_clocksource();
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setup_irq(0, &irq0);
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}
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@ -210,7 +210,7 @@ void mark_tsc_unstable(void)
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}
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EXPORT_SYMBOL_GPL(mark_tsc_unstable);
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static int __init init_tsc_clocksource(void)
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void __init init_tsc_clocksource(void)
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{
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if (!notsc) {
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clocksource_tsc.mult = clocksource_khz2mult(cpu_khz,
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@ -218,9 +218,6 @@ static int __init init_tsc_clocksource(void)
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if (check_tsc_unstable())
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clocksource_tsc.rating = 0;
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return clocksource_register(&clocksource_tsc);
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clocksource_register(&clocksource_tsc);
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}
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return 0;
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}
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module_init(init_tsc_clocksource);
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@ -214,4 +214,7 @@ pm_good:
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return clocksource_register(&clocksource_acpi_pm);
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}
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module_init(init_acpi_pm_clocksource);
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/* We use fs_initcall because we want the PCI fixups to have run
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* but we still need to load before device_initcall
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*/
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fs_initcall(init_acpi_pm_clocksource);
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@ -116,4 +116,4 @@ static int __init init_cyclone_clocksource(void)
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return clocksource_register(&clocksource_cyclone);
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}
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module_init(init_cyclone_clocksource);
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arch_initcall(init_cyclone_clocksource);
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@ -55,6 +55,7 @@ static __always_inline cycles_t get_cycles_sync(void)
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extern void tsc_init(void);
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extern void mark_tsc_unstable(void);
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extern int unsynchronized_tsc(void);
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extern void init_tsc_clocksource(void);
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/*
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* Boot-time check whether the TSCs are synchronized across
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@ -55,16 +55,18 @@ static DEFINE_SPINLOCK(clocksource_lock);
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static char override_name[32];
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static int finished_booting;
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/* clocksource_done_booting - Called near the end of bootup
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/* clocksource_done_booting - Called near the end of core bootup
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*
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* Hack to avoid lots of clocksource churn at boot time
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* Hack to avoid lots of clocksource churn at boot time.
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* We use fs_initcall because we want this to start before
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* device_initcall but after subsys_initcall.
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*/
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static int __init clocksource_done_booting(void)
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{
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finished_booting = 1;
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return 0;
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}
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late_initcall(clocksource_done_booting);
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fs_initcall(clocksource_done_booting);
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#ifdef CONFIG_CLOCKSOURCE_WATCHDOG
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static LIST_HEAD(watchdog_list);
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