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staging/xgifb: Cleanup vb_device_info struct
This patch cleans up the vb_device_info struct and the related functions. The cleanup decreases the size of the compiled module by about 10kB. == Remove fields in vb_device_info that are never read: == pOutputSelect pRGBSenseData pRGBSenseData2 pVideoSenseData pVideoSenseData2 pYCSenseData pYCSenseData2 CR49 pXGINew_I2CDefinition pCR2E pCR2F pCR46 pCR47 pCRD0 pCRDE pSR40 pSR41 pCR47 === Remove the corresponding 'constants' === XGI330_RGBSenseData XGI330_RGBSenseData2 XGI330_VideoSenseData XGI330_VideoSenseData2 XGI330_YCSenseData XGI330_YCSenseData2 XGI330_CR49 XG40_I2CDefinition XG21_CR2E XG21_CR2F XG21_CR46 XG21_CR47 XG27_CRD0 XG27_CRDE XGI330_OutputSelect == Remove 'constant fields' and replace constant value with #define == pSR07 = XGI330_SR07 -> 0x18 pSR1F = XGI330_SR1F -> 0 pSR23 = XGI330_SR23 -> 0xf6 pSR24 = XGI330_SR24 -> 0x0d pSR33 = XGI330_SR33 ->0 pCRT2Data_1_2 = XGI330_CRT2Data_1_2 -> 0 pCRT2Data_4_D = XGI330_CRT2Data_4_D -> 0 pCRT2Data_4_E = XGI330_CRT2Data_4_E -> 0 pCRT2Data_4_10 = XGI330_CRT2Data_4_10 -> 0x80 pSR36 = XG27_SR36 -> 0x30 pCR8F = &XG27_CR8F -> 0x0C pSR40 = XG27_SR40 -> 0x04 pSR41 = XG27_SR41 ->0x00 pSR31 = XGI330_SR31 -> 0xc0 pSR32 = XGI330_SR32 -> 0xc0 SR25 = XGI330_sr25 -> 0 (we only use XGI330_sr25[0]) == Constant fields with 'dead' code: == pSoftSetting is set to XGI330_SoftSetting = 0x30 -> if (*pVBInfo->pSoftSetting & SoftDRAMType) is never true since SoftDRAMType = 0x80 -> if (*pVBInfo->pSoftSetting & ModeSoftSetting) is never true since ModeSoftSetting = 0x04 --> remove the code, remove pSoftSetting, remove XGI330_SoftSetting pDVOSetting is set to XG21_DVOSetting = 0 -> if (((*pVBInfo->pDVOSetting) & 0xC0) == 0xC0) is never true --> remove the code, remove pDVOSetting, remove XG21_DVOSetting pXGINew_DRAMTypeDefinition is set to &XG40_DRAMTypeDefinition 0xFF -> if (*pVBInfo->pXGINew_DRAMTypeDefinition != 0x0C) is always true --> remove the if and remove pXGINew_DRAMTypeDefinition remove XG40_DRAMTypeDefinition == Replace pointer to unsigned char with unsigned char variable and assign value of referenced pointer: == pSR21 -> SR21, remove XGI330_SR21 pSR22 -> SR22, remove XGI330_SR22 pXGINew_CR97 -> XGINew_CR97, remove XG20_CR97, XG27_CR97 and Z11m_CR97 Signed-off-by: Peter Huewe <peterhuewe@gmx.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Peter Huewe
Greg Kroah-Hartman
parent
51f984bc06
commit
6d12dae47e
@ -264,4 +264,23 @@
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#define RES1280x960x85 0x46
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#define RES1280x960x120 0x47
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#define XG27_CR8F 0x0C
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#define XG27_SR36 0x30
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#define XG27_SR40 0x04
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#define XG27_SR41 0x00
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#define XG40_CRCF 0x13
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#define XGI330_CRT2Data_1_2 0
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#define XGI330_CRT2Data_4_D 0
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#define XGI330_CRT2Data_4_E 0
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#define XGI330_CRT2Data_4_10 0x80
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#define XGI330_SR07 0x18
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#define XGI330_SR1F 0
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#define XGI330_SR23 0xf6
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#define XGI330_SR24 0x0d
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#define XGI330_SR25 0
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#define XGI330_SR31 0xc0
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#define XGI330_SR32 0x11
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#define XGI330_SR33 0
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#endif
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@ -5,7 +5,6 @@
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#include "vb_def.h"
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#include "vb_util.h"
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#include "vb_setmode.h"
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static const unsigned short XGINew_DDRDRAM_TYPE340[4][2] = {
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{ 16, 0x45},
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{ 8, 0x35},
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@ -35,21 +34,12 @@ XGINew_GetXG20DRAMType(struct xgi_hw_device_info *HwDeviceExtension,
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unsigned char data, temp;
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if (HwDeviceExtension->jChipType < XG20) {
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if (*pVBInfo->pSoftSetting & SoftDRAMType) {
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data = *pVBInfo->pSoftSetting & 0x07;
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return data;
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} else {
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data = xgifb_reg_get(pVBInfo->P3c4, 0x39) & 0x02;
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if (data == 0)
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data = (xgifb_reg_get(pVBInfo->P3c4, 0x3A) &
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0x02) >> 1;
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return data;
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}
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} else if (HwDeviceExtension->jChipType == XG27) {
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if (*pVBInfo->pSoftSetting & SoftDRAMType) {
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data = *pVBInfo->pSoftSetting & 0x07;
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return data;
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}
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temp = xgifb_reg_get(pVBInfo->P3c4, 0x3B);
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/* SR3B[7][3]MAA15 MAA11 (Power on Trapping) */
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if (((temp & 0x88) == 0x80) || ((temp & 0x88) == 0x08))
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@ -92,13 +82,11 @@ static void XGINew_DDR1x_MRS_340(unsigned long P3c4,
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xgifb_reg_set(P3c4, 0x16, 0x00);
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xgifb_reg_set(P3c4, 0x16, 0x80);
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if (*pVBInfo->pXGINew_DRAMTypeDefinition != 0x0C) { /* Samsung F Die */
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mdelay(3);
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xgifb_reg_set(P3c4, 0x18, 0x00);
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xgifb_reg_set(P3c4, 0x19, 0x20);
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xgifb_reg_set(P3c4, 0x16, 0x00);
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xgifb_reg_set(P3c4, 0x16, 0x80);
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}
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udelay(60);
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xgifb_reg_set(P3c4,
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@ -172,7 +160,7 @@ static void XGINew_DDRII_Bootup_XG27(
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/* Set Double Frequency */
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/* xgifb_reg_set(P3d4, 0x97, 0x11); *//* CR97 */
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xgifb_reg_set(P3d4, 0x97, *pVBInfo->pXGINew_CR97); /* CR97 */
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xgifb_reg_set(P3d4, 0x97, pVBInfo->XGINew_CR97); /* CR97 */
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udelay(200);
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@ -532,7 +520,7 @@ static void XGINew_SetDRAMDefaultRegister340(
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pVBInfo->CR40[0][pVBInfo->ram_type]); /* CR41 */
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if (HwDeviceExtension->jChipType == XG27)
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xgifb_reg_set(P3d4, 0x8F, *pVBInfo->pCR8F); /* CR8F */
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xgifb_reg_set(P3d4, 0x8F, XG27_CR8F); /* CR8F */
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for (j = 0; j <= 6; j++) /* CR90 - CR96 */
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xgifb_reg_set(P3d4, (0x90 + j),
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@ -555,7 +543,7 @@ static void XGINew_SetDRAMDefaultRegister340(
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xgifb_reg_set(P3d4, 0x83, 0x09); /* CR83 */
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xgifb_reg_set(P3d4, 0x87, 0x00); /* CR87 */
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xgifb_reg_set(P3d4, 0xCF, *pVBInfo->pCRCF); /* CRCF */
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xgifb_reg_set(P3d4, 0xCF, XG40_CRCF); /* CRCF */
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if (pVBInfo->ram_type) {
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/* xgifb_reg_set(P3c4, 0x17, 0xC0); */ /* SR17 DDRII */
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xgifb_reg_set(P3c4, 0x17, 0x80); /* SR17 DDRII */
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@ -1075,13 +1063,9 @@ static void XGINew_ChkSenseStatus(struct xgi_hw_device_info *HwDeviceExtension,
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CR3CData = xgifb_reg_get(pVBInfo->P3d4, 0x3c);
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if (!(CR3CData & DisplayDeviceFromCMOS)) {
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tempcx = 0x1FF0;
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if (*pVBInfo->pSoftSetting & ModeSoftSetting)
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tempbx = 0x1FF0;
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}
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} else {
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tempcx = 0x1FF0;
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if (*pVBInfo->pSoftSetting & ModeSoftSetting)
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tempbx = 0x1FF0;
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}
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tempbx &= tempcx;
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@ -1425,7 +1409,7 @@ unsigned char XGIInitNew(struct pci_dev *pdev)
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printk("10");
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if (HwDeviceExtension->jChipType >= XG20)
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xgifb_reg_set(pVBInfo->P3d4, 0x97, *pVBInfo->pXGINew_CR97);
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xgifb_reg_set(pVBInfo->P3d4, 0x97, pVBInfo->XGINew_CR97);
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/* 3.SetMemoryClock
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@ -1435,20 +1419,20 @@ unsigned char XGIInitNew(struct pci_dev *pdev)
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printk("11");
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/* 4.SetDefExt1Regs begin */
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xgifb_reg_set(pVBInfo->P3c4, 0x07, *pVBInfo->pSR07);
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xgifb_reg_set(pVBInfo->P3c4, 0x07, XGI330_SR07);
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if (HwDeviceExtension->jChipType == XG27) {
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xgifb_reg_set(pVBInfo->P3c4, 0x40, *pVBInfo->pSR40);
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xgifb_reg_set(pVBInfo->P3c4, 0x41, *pVBInfo->pSR41);
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xgifb_reg_set(pVBInfo->P3c4, 0x40, XG27_SR40);
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xgifb_reg_set(pVBInfo->P3c4, 0x41, XG27_SR41);
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}
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xgifb_reg_set(pVBInfo->P3c4, 0x11, 0x0F);
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xgifb_reg_set(pVBInfo->P3c4, 0x1F, *pVBInfo->pSR1F);
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xgifb_reg_set(pVBInfo->P3c4, 0x1F, XGI330_SR1F);
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/* xgifb_reg_set(pVBInfo->P3c4, 0x20, 0x20); */
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/* alan, 2001/6/26 Frame buffer can read/write SR20 */
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xgifb_reg_set(pVBInfo->P3c4, 0x20, 0xA0);
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/* Hsuan, 2006/01/01 H/W request for slow corner chip */
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xgifb_reg_set(pVBInfo->P3c4, 0x36, 0x70);
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if (HwDeviceExtension->jChipType == XG27) /* Alan 12/07/2006 */
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xgifb_reg_set(pVBInfo->P3c4, 0x36, *pVBInfo->pSR36);
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xgifb_reg_set(pVBInfo->P3c4, 0x36, XG27_SR36);
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/* SR11 = 0x0F; */
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/* xgifb_reg_set(pVBInfo->P3c4, 0x11, SR11); */
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@ -1534,9 +1518,9 @@ unsigned char XGIInitNew(struct pci_dev *pdev)
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} /* != XG20 */
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/* Set PCI */
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xgifb_reg_set(pVBInfo->P3c4, 0x23, *pVBInfo->pSR23);
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xgifb_reg_set(pVBInfo->P3c4, 0x24, *pVBInfo->pSR24);
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xgifb_reg_set(pVBInfo->P3c4, 0x25, pVBInfo->SR25[0]);
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xgifb_reg_set(pVBInfo->P3c4, 0x23, XGI330_SR23);
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xgifb_reg_set(pVBInfo->P3c4, 0x24, XGI330_SR24);
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xgifb_reg_set(pVBInfo->P3c4, 0x25, XGI330_SR25);
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printk("15");
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if (HwDeviceExtension->jChipType < XG20) { /* kuku 2004/06/25 */
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@ -1550,8 +1534,7 @@ unsigned char XGIInitNew(struct pci_dev *pdev)
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temp = (unsigned char) ((temp1 >> 4) & 0x0F);
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xgifb_reg_set(pVBInfo->Part1Port,
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0x02,
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(*pVBInfo->pCRT2Data_1_2));
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0x02, XGI330_CRT2Data_1_2);
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printk("16");
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@ -1565,15 +1548,15 @@ unsigned char XGIInitNew(struct pci_dev *pdev)
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/* Not DDR */
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xgifb_reg_set(pVBInfo->P3c4,
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0x31,
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(*pVBInfo->pSR31 & 0x3F) | 0x40);
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(XGI330_SR31 & 0x3F) | 0x40);
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xgifb_reg_set(pVBInfo->P3c4,
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0x32,
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(*pVBInfo->pSR32 & 0xFC) | 0x01);
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(XGI330_SR32 & 0xFC) | 0x01);
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} else {
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xgifb_reg_set(pVBInfo->P3c4, 0x31, *pVBInfo->pSR31);
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xgifb_reg_set(pVBInfo->P3c4, 0x32, *pVBInfo->pSR32);
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xgifb_reg_set(pVBInfo->P3c4, 0x31, XGI330_SR31);
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xgifb_reg_set(pVBInfo->P3c4, 0x32, XGI330_SR32);
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}
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xgifb_reg_set(pVBInfo->P3c4, 0x33, *pVBInfo->pSR33);
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xgifb_reg_set(pVBInfo->P3c4, 0x33, XGI330_SR33);
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printk("17");
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/*
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@ -1584,14 +1567,11 @@ unsigned char XGIInitNew(struct pci_dev *pdev)
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if (pVBInfo->IF_DEF_LVDS == 0) {
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xgifb_reg_set(pVBInfo->Part2Port, 0x00, 0x1C);
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xgifb_reg_set(pVBInfo->Part4Port,
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0x0D,
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*pVBInfo->pCRT2Data_4_D);
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0x0D, XGI330_CRT2Data_4_D);
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xgifb_reg_set(pVBInfo->Part4Port,
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0x0E,
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*pVBInfo->pCRT2Data_4_E);
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0x0E, XGI330_CRT2Data_4_E);
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xgifb_reg_set(pVBInfo->Part4Port,
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0x10,
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*pVBInfo->pCRT2Data_4_10);
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0x10, XGI330_CRT2Data_4_10);
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xgifb_reg_set(pVBInfo->Part4Port, 0x0F, 0x3F);
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}
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@ -1651,12 +1631,12 @@ unsigned char XGIInitNew(struct pci_dev *pdev)
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AGP = 0;
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if (AGP == 0)
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*pVBInfo->pSR21 &= 0xEF;
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pVBInfo->SR21 &= 0xEF;
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xgifb_reg_set(pVBInfo->P3c4, 0x21, *pVBInfo->pSR21);
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xgifb_reg_set(pVBInfo->P3c4, 0x21, pVBInfo->SR21);
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if (AGP == 1)
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*pVBInfo->pSR22 &= 0x20;
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xgifb_reg_set(pVBInfo->P3c4, 0x22, *pVBInfo->pSR22);
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pVBInfo->SR22 &= 0x20;
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xgifb_reg_set(pVBInfo->P3c4, 0x22, pVBInfo->SR22);
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*/
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/* base = 0x80000000; */
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/* OutPortLong(0xcf8, base); */
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@ -1664,12 +1644,12 @@ unsigned char XGIInitNew(struct pci_dev *pdev)
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/* if (Temp == 0x1039) { */
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xgifb_reg_set(pVBInfo->P3c4,
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0x22,
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(unsigned char) ((*pVBInfo->pSR22) & 0xFE));
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(unsigned char) ((pVBInfo->SR22) & 0xFE));
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/* } else { */
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/* xgifb_reg_set(pVBInfo->P3c4, 0x22, *pVBInfo->pSR22); */
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/* xgifb_reg_set(pVBInfo->P3c4, 0x22, pVBInfo->SR22); */
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/* } */
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xgifb_reg_set(pVBInfo->P3c4, 0x21, *pVBInfo->pSR21);
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xgifb_reg_set(pVBInfo->P3c4, 0x21, pVBInfo->SR21);
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printk("23");
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@ -38,9 +38,6 @@ void InitTo330Pointer(unsigned char ChipType, struct vb_device_info *pVBInfo)
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pVBInfo->ModeResInfo
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= (struct SiS_ModeResInfo_S *) XGI330_ModeResInfo;
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pVBInfo->pOutputSelect = &XGI330_OutputSelect;
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pVBInfo->pSoftSetting = &XGI330_SoftSetting;
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pVBInfo->pSR07 = &XGI330_SR07;
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pVBInfo->LCDResInfo = 0;
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pVBInfo->LCDTypeInfo = 0;
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pVBInfo->LCDInfo = 0;
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@ -49,36 +46,15 @@ void InitTo330Pointer(unsigned char ChipType, struct vb_device_info *pVBInfo)
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pVBInfo->SR15 = XGI340_SR13;
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pVBInfo->CR40 = XGI340_cr41;
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pVBInfo->SR25 = XGI330_sr25;
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pVBInfo->pSR31 = &XGI330_sr31;
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pVBInfo->pSR32 = &XGI330_sr32;
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pVBInfo->CR6B = XGI340_CR6B;
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pVBInfo->CR6E = XGI340_CR6E;
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pVBInfo->CR6F = XGI340_CR6F;
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pVBInfo->CR89 = XGI340_CR89;
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pVBInfo->AGPReg = XGI340_AGPReg;
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pVBInfo->SR16 = XGI340_SR16;
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pVBInfo->pCRCF = &XG40_CRCF;
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pVBInfo->pXGINew_DRAMTypeDefinition = &XG40_DRAMTypeDefinition;
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pVBInfo->CR49 = XGI330_CR49;
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pVBInfo->pSR1F = &XGI330_SR1F;
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pVBInfo->pSR21 = &XGI330_SR21;
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pVBInfo->pSR22 = &XGI330_SR22;
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pVBInfo->pSR23 = &XGI330_SR23;
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pVBInfo->pSR24 = &XGI330_SR24;
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pVBInfo->pSR33 = &XGI330_SR33;
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pVBInfo->pCRT2Data_1_2 = &XGI330_CRT2Data_1_2;
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pVBInfo->pCRT2Data_4_D = &XGI330_CRT2Data_4_D;
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pVBInfo->pCRT2Data_4_E = &XGI330_CRT2Data_4_E;
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pVBInfo->pCRT2Data_4_10 = &XGI330_CRT2Data_4_10;
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pVBInfo->pRGBSenseData = &XGI330_RGBSenseData;
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pVBInfo->pVideoSenseData = &XGI330_VideoSenseData;
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pVBInfo->pYCSenseData = &XGI330_YCSenseData;
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pVBInfo->pRGBSenseData2 = &XGI330_RGBSenseData2;
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pVBInfo->pVideoSenseData2 = &XGI330_VideoSenseData2;
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pVBInfo->pYCSenseData2 = &XGI330_YCSenseData2;
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pVBInfo->SR21 = 0xa3;
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pVBInfo->SR22 = 0xfb;
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pVBInfo->NTSCTiming = XGI330_NTSCTiming;
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pVBInfo->PALTiming = XGI330_PALTiming;
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@ -105,38 +81,22 @@ void InitTo330Pointer(unsigned char ChipType, struct vb_device_info *pVBInfo)
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else
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pVBInfo->LCDCapList = XGI_LCDCapList;
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pVBInfo->pXGINew_I2CDefinition = &XG40_I2CDefinition;
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if (ChipType >= XG20)
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pVBInfo->pXGINew_CR97 = &XG20_CR97;
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pVBInfo->XGINew_CR97 = 0x10;
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if (ChipType == XG27) {
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unsigned char temp;
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pVBInfo->MCLKData
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= (struct SiS_MCLKData *) XGI27New_MCLKData;
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pVBInfo->CR40 = XGI27_cr41;
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pVBInfo->pXGINew_CR97 = &XG27_CR97;
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pVBInfo->pSR36 = &XG27_SR36;
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pVBInfo->pCR8F = &XG27_CR8F;
|
||||
pVBInfo->pCRD0 = XG27_CRD0;
|
||||
pVBInfo->pCRDE = XG27_CRDE;
|
||||
pVBInfo->pSR40 = &XG27_SR40;
|
||||
pVBInfo->pSR41 = &XG27_SR41;
|
||||
pVBInfo->XGINew_CR97 = 0xc1;
|
||||
pVBInfo->SR15 = XG27_SR13;
|
||||
|
||||
/*Z11m DDR*/
|
||||
temp = xgifb_reg_get(pVBInfo->P3c4, 0x3B);
|
||||
/* SR3B[7][3]MAA15 MAA11 (Power on Trapping) */
|
||||
if (((temp & 0x88) == 0x80) || ((temp & 0x88) == 0x08))
|
||||
pVBInfo->pXGINew_CR97 = &Z11m_CR97;
|
||||
}
|
||||
|
||||
if (ChipType >= XG20) {
|
||||
pVBInfo->pDVOSetting = &XG21_DVOSetting;
|
||||
pVBInfo->pCR2E = &XG21_CR2E;
|
||||
pVBInfo->pCR2F = &XG21_CR2F;
|
||||
pVBInfo->pCR46 = &XG21_CR46;
|
||||
pVBInfo->pCR47 = &XG21_CR47;
|
||||
pVBInfo->XGINew_CR97 = 0x80;
|
||||
}
|
||||
|
||||
}
|
||||
@ -783,13 +743,6 @@ static void xgifb_set_lcd(int chip_id,
|
||||
}
|
||||
}
|
||||
|
||||
if (((*pVBInfo->pDVOSetting) & 0xC0) == 0xC0) {
|
||||
xgifb_reg_set(pVBInfo->P3d4, 0x2E, *pVBInfo->pCR2E);
|
||||
xgifb_reg_set(pVBInfo->P3d4, 0x2F, *pVBInfo->pCR2F);
|
||||
xgifb_reg_set(pVBInfo->P3d4, 0x46, *pVBInfo->pCR46);
|
||||
xgifb_reg_set(pVBInfo->P3d4, 0x47, *pVBInfo->pCR47);
|
||||
}
|
||||
|
||||
if (chip_id == XG27) {
|
||||
XGI_SetXG27FPBits(pVBInfo);
|
||||
} else {
|
||||
|
||||
@ -191,45 +191,11 @@ struct vb_device_info {
|
||||
unsigned char (*SR15)[8];
|
||||
unsigned char (*CR40)[8];
|
||||
|
||||
unsigned char *pSoftSetting;
|
||||
unsigned char *pOutputSelect;
|
||||
|
||||
unsigned short *pRGBSenseData;
|
||||
unsigned short *pRGBSenseData2; /*301b*/
|
||||
unsigned short *pVideoSenseData;
|
||||
unsigned short *pVideoSenseData2;
|
||||
unsigned short *pYCSenseData;
|
||||
unsigned short *pYCSenseData2;
|
||||
|
||||
unsigned char *pSR07;
|
||||
unsigned char *CR49;
|
||||
unsigned char *pSR1F;
|
||||
unsigned char *AGPReg;
|
||||
unsigned char *SR16;
|
||||
unsigned char *pSR21;
|
||||
unsigned char *pSR22;
|
||||
unsigned char *pSR23;
|
||||
unsigned char *pSR24;
|
||||
unsigned char *SR25;
|
||||
unsigned char *pSR31;
|
||||
unsigned char *pSR32;
|
||||
unsigned char *pSR33;
|
||||
unsigned char *pSR36; /* alan 12/07/2006 */
|
||||
unsigned char *pCRCF;
|
||||
unsigned char *pCRD0; /* alan 12/07/2006 */
|
||||
unsigned char *pCRDE; /* alan 12/07/2006 */
|
||||
unsigned char *pCR8F; /* alan 12/07/2006 */
|
||||
unsigned char *pSR40; /* alan 12/07/2006 */
|
||||
unsigned char *pSR41; /* alan 12/07/2006 */
|
||||
unsigned char *pDVOSetting;
|
||||
unsigned char *pCR2E;
|
||||
unsigned char *pCR2F;
|
||||
unsigned char *pCR46;
|
||||
unsigned char *pCR47;
|
||||
unsigned char *pCRT2Data_1_2;
|
||||
unsigned char *pCRT2Data_4_D;
|
||||
unsigned char *pCRT2Data_4_E;
|
||||
unsigned char *pCRT2Data_4_10;
|
||||
unsigned char SR21;
|
||||
unsigned char SR22;
|
||||
unsigned char SR25;
|
||||
struct SiS_MCLKData *MCLKData;
|
||||
struct XGI_ECLKDataStruct *ECLKData;
|
||||
|
||||
@ -249,8 +215,7 @@ struct vb_device_info {
|
||||
unsigned char *Ren750pGroup3;
|
||||
unsigned char *ScreenOffset;
|
||||
unsigned char *pXGINew_DRAMTypeDefinition;
|
||||
unsigned char *pXGINew_I2CDefinition ;
|
||||
unsigned char *pXGINew_CR97 ;
|
||||
unsigned char XGINew_CR97;
|
||||
|
||||
struct XGI330_LCDCapStruct *LCDCapList;
|
||||
|
||||
|
||||
@ -130,13 +130,6 @@ static unsigned char XGI340_AGPReg[12] = {
|
||||
|
||||
static unsigned char XGI340_SR16[4] = {0x03, 0x83, 0x03, 0x83};
|
||||
|
||||
static unsigned char XGI330_sr25[2];
|
||||
static unsigned char XGI330_sr31 = 0xc0;
|
||||
static unsigned char XGI330_sr32 = 0x11;
|
||||
static unsigned char XGI330_SR33;
|
||||
static unsigned char XG40_CRCF = 0x13;
|
||||
static unsigned char XG40_DRAMTypeDefinition = 0xFF ;
|
||||
|
||||
static struct XGI_ExtStruct XGI330_EModeIDTable[] = {
|
||||
{0x2e, 0x0a1b, 0x0306, 0x06, 0x05, 0x06},
|
||||
{0x2f, 0x0a1b, 0x0305, 0x05, 0x05, 0x05},
|
||||
@ -2255,48 +2248,6 @@ static struct SiS_ModeResInfo_S XGI330_ModeResInfo[] = {
|
||||
{1152, 864, 8, 16}
|
||||
};
|
||||
|
||||
static unsigned char XGI330_OutputSelect = 0x40;
|
||||
static unsigned char XGI330_SoftSetting = 0x30;
|
||||
static unsigned char XGI330_SR07 = 0x18;
|
||||
|
||||
static unsigned char XGI330_CR49[] = {0xaa, 0x88};
|
||||
static unsigned char XGI330_SR1F;
|
||||
static unsigned char XGI330_SR21 = 0xa3;
|
||||
static unsigned char XGI330_SR22 = 0xfb;
|
||||
static unsigned char XGI330_SR23 = 0xf6;
|
||||
static unsigned char XGI330_SR24 = 0xd;
|
||||
|
||||
static unsigned char XGI330_CRT2Data_1_2;
|
||||
static unsigned char XGI330_CRT2Data_4_D;
|
||||
static unsigned char XGI330_CRT2Data_4_E;
|
||||
static unsigned char XGI330_CRT2Data_4_10 = 0x80;
|
||||
static unsigned short XGI330_RGBSenseData = 0xd1;
|
||||
static unsigned short XGI330_VideoSenseData = 0xb9;
|
||||
static unsigned short XGI330_YCSenseData = 0xb3;
|
||||
static unsigned short XGI330_RGBSenseData2 = 0x0190; /*301b*/
|
||||
static unsigned short XGI330_VideoSenseData2 = 0x0110;
|
||||
static unsigned short XGI330_YCSenseData2 = 0x016B;
|
||||
static unsigned char XG40_I2CDefinition;
|
||||
static unsigned char XG20_CR97 = 0x10 ;
|
||||
|
||||
static unsigned char XG21_DVOSetting;
|
||||
static unsigned char XG21_CR2E;
|
||||
static unsigned char XG21_CR2F;
|
||||
static unsigned char XG21_CR46;
|
||||
static unsigned char XG21_CR47;
|
||||
|
||||
static unsigned char XG27_CR97 = 0xC1 ;
|
||||
static unsigned char XG27_SR36 = 0x30 ;
|
||||
static unsigned char XG27_CR8F = 0x0C ;
|
||||
static unsigned char XG27_CRD0[] = {
|
||||
0, 0, 0, 0, 0, 0, 0, 0x82, 0x00, 0x66, 0x01, 0x00
|
||||
};
|
||||
static unsigned char XG27_CRDE[2];
|
||||
static unsigned char XG27_SR40 = 0x04 ;
|
||||
static unsigned char XG27_SR41 = 0x00 ;
|
||||
|
||||
static unsigned char Z11m_CR97 = 0x80 ;
|
||||
|
||||
static struct SiS_VCLKData XGI_VCLKData[] = {
|
||||
/* SR2B,SR2C,SR2D */
|
||||
{0x1B, 0xE1, 25}, /* 00 (25.175MHz) */
|
||||
|
||||
Loading…
Reference in New Issue
Block a user