mirror of
https://github.com/FEX-Emu/linux.git
synced 2024-12-21 08:53:41 +00:00
net/phy: fix DP83865 phy interrupt handler
According to the DP83865 datasheet we need to clear the interrupt status bit by writing a 1 to the corresponding bit in INT_CLEAR (2:0 are reserved). Proposed and tested by Thorsten. Signed-off-by: Thorsten Schubert <tshu@msc-ge.com> Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
parent
e2e6be56df
commit
6e6f400f53
@ -25,8 +25,9 @@
|
||||
/* DP83865 phy identifier values */
|
||||
#define DP83865_PHY_ID 0x20005c7a
|
||||
|
||||
#define DP83865_INT_MASK_REG 0x15
|
||||
#define DP83865_INT_MASK_STATUS 0x14
|
||||
#define DP83865_INT_STATUS 0x14
|
||||
#define DP83865_INT_MASK 0x15
|
||||
#define DP83865_INT_CLEAR 0x17
|
||||
|
||||
#define DP83865_INT_REMOTE_FAULT 0x0008
|
||||
#define DP83865_INT_ANE_COMPLETED 0x0010
|
||||
@ -68,21 +69,25 @@ static int ns_config_intr(struct phy_device *phydev)
|
||||
int err;
|
||||
|
||||
if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
|
||||
err = phy_write(phydev, DP83865_INT_MASK_REG,
|
||||
err = phy_write(phydev, DP83865_INT_MASK,
|
||||
DP83865_INT_MASK_DEFAULT);
|
||||
else
|
||||
err = phy_write(phydev, DP83865_INT_MASK_REG, 0);
|
||||
err = phy_write(phydev, DP83865_INT_MASK, 0);
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
static int ns_ack_interrupt(struct phy_device *phydev)
|
||||
{
|
||||
int ret = phy_read(phydev, DP83865_INT_MASK_STATUS);
|
||||
int ret = phy_read(phydev, DP83865_INT_STATUS);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
return 0;
|
||||
/* Clear the interrupt status bit by writing a “1”
|
||||
* to the corresponding bit in INT_CLEAR (2:0 are reserved) */
|
||||
ret = phy_write(phydev, DP83865_INT_CLEAR, ret & ~0x7);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void ns_giga_speed_fallback(struct phy_device *phydev, int mode)
|
||||
|
Loading…
Reference in New Issue
Block a user