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sh_eth: add sh_eth_cpu_data::no_xdfar flag

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The commit 6ded286555 ("sh_eth: Fix RX recovery on R-Car in case of RX
ring underrun") added a check for an bad RDFAR offset in sh_eth_rx(), so
that the code could work on the R-Car Ether controllers which don't have
this register (and TDFAR), then the commit 3365711df0 ("sh_eth: WARN on
access to a register not implemented in a particular chip") replaced
offset 0 with 0xffff. Adding/checking the 'no_xdfar' bit field in the
'struct sh_eth_cpu_data' instead results in less object code...

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Sergei Shtylyov 2018-04-01 00:22:08 +03:00 committed by David S. Miller
parent 16c3c91346
commit 6e80e55bd3
2 changed files with 4 additions and 2 deletions
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5
drivers/net/ethernet/renesas/sh_eth.c
View File

@ -702,6 +702,7 @@ static struct sh_eth_cpu_data rcar_gen1_data = {
.mpr = 1,
.tpauser = 1,
.hw_swap = 1,
.no_xdfar = 1,
};
/* R-Car Gen2 and RZ/G1 */
@ -735,6 +736,7 @@ static struct sh_eth_cpu_data rcar_gen2_data = {
.mpr = 1,
.tpauser = 1,
.hw_swap = 1,
.no_xdfar = 1,
.rmiimode = 1,
.magic = 1,
};
@ -1615,8 +1617,7 @@ static int sh_eth_rx(struct net_device *ndev, u32 intr_status, int *quota)
/* If we don't need to check status, don't. -KDU */
if (!(sh_eth_read(ndev, EDRRR) & EDRRR_R)) {
/* fix the values for the next receiving if RDE is set */
if (intr_status & EESR_RDE &&
mdp->reg_offset[RDFAR] != SH_ETH_OFFSET_INVALID) {
if (intr_status & EESR_RDE && !mdp->cd->no_xdfar) {
u32 count = (sh_eth_read(ndev, RDFAR) -
sh_eth_read(ndev, RDLAR)) >> 4;

1
drivers/net/ethernet/renesas/sh_eth.h
View File

@ -508,6 +508,7 @@ struct sh_eth_cpu_data {
unsigned rpadir:1; /* E-DMAC have RPADIR */
unsigned no_trimd:1; /* E-DMAC DO NOT have TRIMD */
unsigned no_ade:1; /* E-DMAC DO NOT have ADE bit in EESR */
unsigned no_xdfar:1; /* E-DMAC DOES NOT have RDFAR/TDFAR */
unsigned xdfar_rw:1; /* E-DMAC has writeable RDFAR/TDFAR */
unsigned hw_checksum:1; /* E-DMAC has CSMR */
unsigned select_mii:1; /* EtherC have RMII_MII (MII select register) */