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Staging/IIO fixes for 4.10-rc3
Here are some staging and IIO driver fixes for 4.10-rc3. Most of these are minor IIO fixes of reported issues, along with one network driver fix to resolve an issue. And a MAINTAINERS update with a new mailing list. All of these, except the MAINTAINERS file update, have been in linux-next with no reported issues (the MAINTAINERS patch happened on Friday...) Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> -----BEGIN PGP SIGNATURE----- iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCWHI38g8cZ3JlZ0Brcm9h aC5jb20ACgkQMUfUDdst+ylb7QCeJ2cCP31YfVYCS7VsvFHJnijFuQsAnAq/JMN3 ZKXm7aPjN2Yv5Op45SEX =aEMA -----END PGP SIGNATURE----- Merge tag 'staging-4.10-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging Pull staging/IIO fixes from Greg KH: "Here are some staging and IIO driver fixes for 4.10-rc3. Most of these are minor IIO fixes of reported issues, along with one network driver fix to resolve an issue. And a MAINTAINERS update with a new mailing list. All of these, except the MAINTAINERS file update, have been in linux-next with no reported issues (the MAINTAINERS patch happened on Friday...)" * tag 'staging-4.10-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging: MAINTAINERS: add greybus subsystem mailing list staging: octeon: Call SET_NETDEV_DEV() iio: accel: st_accel: fix LIS3LV02 reading and scaling iio: common: st_sensors: fix channel data parsing iio: max44000: correct value in illuminance_integration_time_available iio: adc: TI_AM335X_ADC should depend on HAS_DMA iio: bmi160: Fix time needed to sleep after command execution iio: 104-quad-8: Fix active level mismatch for the preset enable option iio: 104-quad-8: Fix off-by-one errors when addressing IOR iio: 104-quad-8: Fix index control configuration
This commit is contained in:
commit
6ea17ed15d
@ -5507,6 +5507,7 @@ M: Alex Elder <elder@kernel.org>
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M: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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S: Maintained
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F: drivers/staging/greybus/
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L: greybus-dev@lists.linaro.org
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GREYBUS AUDIO PROTOCOLS DRIVERS
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M: Vaibhav Agarwal <vaibhav.sr@gmail.com>
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@ -353,12 +353,12 @@ static const struct st_sensor_settings st_accel_sensors_settings[] = {
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[0] = {
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.num = ST_ACCEL_FS_AVL_2G,
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.value = 0x00,
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.gain = IIO_G_TO_M_S_2(1024),
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.gain = IIO_G_TO_M_S_2(1000),
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},
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[1] = {
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.num = ST_ACCEL_FS_AVL_6G,
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.value = 0x01,
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.gain = IIO_G_TO_M_S_2(340),
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.gain = IIO_G_TO_M_S_2(3000),
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},
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},
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},
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@ -366,6 +366,14 @@ static const struct st_sensor_settings st_accel_sensors_settings[] = {
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.addr = 0x21,
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.mask = 0x40,
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},
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/*
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* Data Alignment Setting - needs to be set to get
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* left-justified data like all other sensors.
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*/
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.das = {
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.addr = 0x21,
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.mask = 0x01,
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},
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.drdy_irq = {
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.addr = 0x21,
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.mask_int1 = 0x04,
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@ -561,7 +561,7 @@ config TI_ADS8688
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config TI_AM335X_ADC
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tristate "TI's AM335X ADC driver"
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depends on MFD_TI_AM335X_TSCADC
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depends on MFD_TI_AM335X_TSCADC && HAS_DMA
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select IIO_BUFFER
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select IIO_KFIFO_BUF
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help
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@ -30,7 +30,9 @@ static int st_sensors_get_buffer_element(struct iio_dev *indio_dev, u8 *buf)
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for_each_set_bit(i, indio_dev->active_scan_mask, num_data_channels) {
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const struct iio_chan_spec *channel = &indio_dev->channels[i];
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unsigned int bytes_to_read = channel->scan_type.realbits >> 3;
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unsigned int bytes_to_read =
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DIV_ROUND_UP(channel->scan_type.realbits +
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channel->scan_type.shift, 8);
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unsigned int storage_bytes =
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channel->scan_type.storagebits >> 3;
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@ -401,6 +401,15 @@ int st_sensors_init_sensor(struct iio_dev *indio_dev,
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return err;
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}
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/* set DAS */
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if (sdata->sensor_settings->das.addr) {
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err = st_sensors_write_data_with_mask(indio_dev,
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sdata->sensor_settings->das.addr,
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sdata->sensor_settings->das.mask, 1);
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if (err < 0)
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return err;
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}
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if (sdata->int_pin_open_drain) {
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dev_info(&indio_dev->dev,
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"set interrupt line to open drain mode\n");
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@ -483,8 +492,10 @@ static int st_sensors_read_axis_data(struct iio_dev *indio_dev,
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int err;
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u8 *outdata;
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struct st_sensor_data *sdata = iio_priv(indio_dev);
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unsigned int byte_for_channel = ch->scan_type.realbits >> 3;
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unsigned int byte_for_channel;
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byte_for_channel = DIV_ROUND_UP(ch->scan_type.realbits +
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ch->scan_type.shift, 8);
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outdata = kmalloc(byte_for_channel, GFP_KERNEL);
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if (!outdata)
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return -ENOMEM;
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@ -153,7 +153,7 @@ static int quad8_write_raw(struct iio_dev *indio_dev,
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ior_cfg = val | priv->preset_enable[chan->channel] << 1;
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/* Load I/O control configuration */
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outb(0x40 | ior_cfg, base_offset);
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outb(0x40 | ior_cfg, base_offset + 1);
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return 0;
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case IIO_CHAN_INFO_SCALE:
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@ -233,7 +233,7 @@ static ssize_t quad8_read_set_to_preset_on_index(struct iio_dev *indio_dev,
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const struct quad8_iio *const priv = iio_priv(indio_dev);
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return snprintf(buf, PAGE_SIZE, "%u\n",
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priv->preset_enable[chan->channel]);
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!priv->preset_enable[chan->channel]);
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}
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static ssize_t quad8_write_set_to_preset_on_index(struct iio_dev *indio_dev,
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@ -241,7 +241,7 @@ static ssize_t quad8_write_set_to_preset_on_index(struct iio_dev *indio_dev,
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size_t len)
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{
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struct quad8_iio *const priv = iio_priv(indio_dev);
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const int base_offset = priv->base + 2 * chan->channel;
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const int base_offset = priv->base + 2 * chan->channel + 1;
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bool preset_enable;
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int ret;
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unsigned int ior_cfg;
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@ -250,6 +250,9 @@ static ssize_t quad8_write_set_to_preset_on_index(struct iio_dev *indio_dev,
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if (ret)
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return ret;
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/* Preset enable is active low in Input/Output Control register */
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preset_enable = !preset_enable;
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priv->preset_enable[chan->channel] = preset_enable;
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ior_cfg = priv->ab_enable[chan->channel] |
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@ -362,7 +365,7 @@ static int quad8_set_synchronous_mode(struct iio_dev *indio_dev,
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priv->synchronous_mode[chan->channel] = synchronous_mode;
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/* Load Index Control configuration to Index Control Register */
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outb(0x40 | idr_cfg, base_offset);
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outb(0x60 | idr_cfg, base_offset);
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return 0;
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}
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@ -444,7 +447,7 @@ static int quad8_set_index_polarity(struct iio_dev *indio_dev,
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priv->index_polarity[chan->channel] = index_polarity;
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/* Load Index Control configuration to Index Control Register */
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outb(0x40 | idr_cfg, base_offset);
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outb(0x60 | idr_cfg, base_offset);
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return 0;
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}
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@ -66,10 +66,8 @@
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#define BMI160_REG_DUMMY 0x7F
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#define BMI160_ACCEL_PMU_MIN_USLEEP 3200
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#define BMI160_ACCEL_PMU_MAX_USLEEP 3800
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#define BMI160_GYRO_PMU_MIN_USLEEP 55000
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#define BMI160_GYRO_PMU_MAX_USLEEP 80000
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#define BMI160_ACCEL_PMU_MIN_USLEEP 3800
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#define BMI160_GYRO_PMU_MIN_USLEEP 80000
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#define BMI160_SOFTRESET_USLEEP 1000
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#define BMI160_CHANNEL(_type, _axis, _index) { \
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@ -151,20 +149,9 @@ static struct bmi160_regs bmi160_regs[] = {
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},
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};
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struct bmi160_pmu_time {
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unsigned long min;
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unsigned long max;
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};
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static struct bmi160_pmu_time bmi160_pmu_time[] = {
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[BMI160_ACCEL] = {
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.min = BMI160_ACCEL_PMU_MIN_USLEEP,
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.max = BMI160_ACCEL_PMU_MAX_USLEEP
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},
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[BMI160_GYRO] = {
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.min = BMI160_GYRO_PMU_MIN_USLEEP,
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.max = BMI160_GYRO_PMU_MIN_USLEEP,
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},
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static unsigned long bmi160_pmu_time[] = {
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[BMI160_ACCEL] = BMI160_ACCEL_PMU_MIN_USLEEP,
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[BMI160_GYRO] = BMI160_GYRO_PMU_MIN_USLEEP,
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};
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struct bmi160_scale {
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@ -289,7 +276,7 @@ int bmi160_set_mode(struct bmi160_data *data, enum bmi160_sensor_type t,
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if (ret < 0)
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return ret;
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usleep_range(bmi160_pmu_time[t].min, bmi160_pmu_time[t].max);
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usleep_range(bmi160_pmu_time[t], bmi160_pmu_time[t] + 1000);
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return 0;
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}
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@ -113,7 +113,7 @@ static const char max44000_int_time_avail_str[] =
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"0.100 "
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"0.025 "
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"0.00625 "
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"0.001625";
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"0.0015625";
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/* Available scales (internal to ulux) with pretty manual alignment: */
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static const int max44000_scale_avail_ulux_array[] = {
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@ -770,6 +770,7 @@ static int cvm_oct_probe(struct platform_device *pdev)
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/* Initialize the device private structure. */
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struct octeon_ethernet *priv = netdev_priv(dev);
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SET_NETDEV_DEV(dev, &pdev->dev);
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dev->netdev_ops = &cvm_oct_pow_netdev_ops;
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priv->imode = CVMX_HELPER_INTERFACE_MODE_DISABLED;
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priv->port = CVMX_PIP_NUM_INPUT_PORTS;
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@ -816,6 +817,7 @@ static int cvm_oct_probe(struct platform_device *pdev)
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}
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/* Initialize the device private structure. */
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SET_NETDEV_DEV(dev, &pdev->dev);
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priv = netdev_priv(dev);
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priv->netdev = dev;
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priv->of_node = cvm_oct_node_for_port(pip, interface,
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@ -115,6 +115,16 @@ struct st_sensor_bdu {
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u8 mask;
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};
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/**
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* struct st_sensor_das - ST sensor device data alignment selection
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* @addr: address of the register.
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* @mask: mask to write the das flag for left alignment.
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*/
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struct st_sensor_das {
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u8 addr;
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u8 mask;
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};
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/**
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* struct st_sensor_data_ready_irq - ST sensor device data-ready interrupt
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* @addr: address of the register.
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@ -185,6 +195,7 @@ struct st_sensor_transfer_function {
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* @enable_axis: Enable one or more axis of the sensor.
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* @fs: Full scale register and full scale list available.
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* @bdu: Block data update register.
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* @das: Data Alignment Selection register.
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* @drdy_irq: Data ready register of the sensor.
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* @multi_read_bit: Use or not particular bit for [I2C/SPI] multi-read.
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* @bootime: samples to discard when sensor passing from power-down to power-up.
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@ -200,6 +211,7 @@ struct st_sensor_settings {
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struct st_sensor_axis enable_axis;
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struct st_sensor_fullscale fs;
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struct st_sensor_bdu bdu;
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struct st_sensor_das das;
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struct st_sensor_data_ready_irq drdy_irq;
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bool multi_read_bit;
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unsigned int bootime;
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