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MIPS: inst.h: define MT yield op

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The opcode for the MT ASE yield instruction within the spec3 group was
missing. This patch adds it for use by a subsequent patch.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
This commit is contained in:
Paul Burton 2014-03-04 15:11:12 +00:00
parent b0a3eae2b9
commit 6f5bb42498
1 changed files with 11 additions and 10 deletions
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21
arch/mips/include/uapi/asm/inst.h
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@ -74,16 +74,17 @@ enum spec2_op {
enum spec3_op { enum spec3_op {
ext_op, dextm_op, dextu_op, dext_op, ext_op, dextm_op, dextu_op, dext_op,
ins_op, dinsm_op, dinsu_op, dins_op, ins_op, dinsm_op, dinsu_op, dins_op,
lx_op = 0x0a, lwle_op = 0x19, yield_op = 0x09, lx_op = 0x0a,
lwre_op = 0x1a, cachee_op = 0x1b, lwle_op = 0x19, lwre_op = 0x1a,
sbe_op = 0x1c, she_op = 0x1d, cachee_op = 0x1b, sbe_op = 0x1c,
sce_op = 0x1e, swe_op = 0x1f, she_op = 0x1d, sce_op = 0x1e,
bshfl_op = 0x20, swle_op = 0x21, swe_op = 0x1f, bshfl_op = 0x20,
swre_op = 0x22, prefe_op = 0x23, swle_op = 0x21, swre_op = 0x22,
dbshfl_op = 0x24, lbue_op = 0x28, prefe_op = 0x23, dbshfl_op = 0x24,
lhue_op = 0x29, lbe_op = 0x2c, lbue_op = 0x28, lhue_op = 0x29,
lhe_op = 0x2d, lle_op = 0x2e, lbe_op = 0x2c, lhe_op = 0x2d,
lwe_op = 0x2f, rdhwr_op = 0x3b lle_op = 0x2e, lwe_op = 0x2f,
rdhwr_op = 0x3b
}; };
/* /*