mirror of
https://github.com/FEX-Emu/linux.git
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viafb: introduce per output device power management
This patch moves common parts of dvi.c, lcd.c and vt1636.c to hw.c to start a per output device power management. There should be no runtime changes aside that this patch enables the proc interface to enable/disable devices when needed which greatly increases the chances that changes to the output device configuration will work. However the power management is not yet complete so it might fail on some configurations. As this area is quite complex and touches undocumented things there is a slight chance of regressions. Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de> Cc: Joseph Chan <JosephChan@via.com.tw>
This commit is contained in:
parent
c2a07c932d
commit
6f9422d4e4
@ -469,26 +469,6 @@ static void __devinit dvi_get_panel_size_from_DDCv2(
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/* If Disable DVI, turn off pad */
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void viafb_dvi_disable(void)
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{
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if (viaparinfo->chip_info->
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tmds_chip_info.output_interface == INTERFACE_DVP0)
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viafb_write_reg(SR1E, VIASR,
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viafb_read_reg(VIASR, SR1E) & (~0xC0));
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if (viaparinfo->chip_info->
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tmds_chip_info.output_interface == INTERFACE_DVP1)
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viafb_write_reg(SR1E, VIASR,
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viafb_read_reg(VIASR, SR1E) & (~0x30));
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if (viaparinfo->chip_info->
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tmds_chip_info.output_interface == INTERFACE_DFP_HIGH)
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viafb_write_reg(SR2A, VIASR,
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viafb_read_reg(VIASR, SR2A) & (~0x0C));
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if (viaparinfo->chip_info->
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tmds_chip_info.output_interface == INTERFACE_DFP_LOW)
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viafb_write_reg(SR2A, VIASR,
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viafb_read_reg(VIASR, SR2A) & (~0x03));
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if (viaparinfo->chip_info->
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tmds_chip_info.output_interface == INTERFACE_TMDS)
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/* Turn off TMDS power. */
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@ -571,7 +551,6 @@ void viafb_dvi_enable(void)
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case INTERFACE_DVP0:
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viafb_write_reg_mask(CR6B, VIACR, 0x01, BIT0);
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viafb_write_reg_mask(CR6C, VIACR, 0x21, BIT0 + BIT5);
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viafb_write_reg_mask(SR1E, VIASR, 0xC0, BIT7 + BIT6);
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dvi_patch_skew_dvp0();
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if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266)
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tmds_register_write(0x88, 0x3b);
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@ -585,7 +564,6 @@ void viafb_dvi_enable(void)
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if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266)
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viafb_write_reg_mask(CR93, VIACR, 0x21, BIT0 + BIT5);
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viafb_write_reg_mask(SR1E, VIASR, 0x30, BIT4 + BIT5);
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/*fix dvi cann't be enabled with MB VT5718C4 - Al Zhang */
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if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266)
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tmds_register_write(0x88, 0x3b);
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@ -616,14 +594,13 @@ void viafb_dvi_enable(void)
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if (viaparinfo->chip_info->gfx_chip_name != UNICHROME_CLE266)
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via_write_reg_mask(VIACR, CR97, 0x03, 0x03);
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viafb_write_reg_mask(SR2A, VIASR, 0x0C, BIT2 + BIT3);
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via_write_reg_mask(VIACR, 0x91, 0x00, 0x20);
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break;
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case INTERFACE_DFP_LOW:
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if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266)
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break;
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viafb_write_reg_mask(SR2A, VIASR, 0x03, BIT0 + BIT1);
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dvi_patch_skew_dvp_low();
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via_write_reg_mask(VIACR, 0x91, 0x00, 0x20);
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break;
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@ -1036,6 +1036,121 @@ void via_set_source(u32 devices, u8 iga)
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set_lvds2_source(iga);
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}
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static void set_crt_state(u8 state)
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{
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u8 value;
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switch (state) {
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case VIA_STATE_ON:
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value = 0x00;
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break;
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case VIA_STATE_STANDBY:
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value = 0x10;
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break;
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case VIA_STATE_SUSPEND:
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value = 0x20;
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break;
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case VIA_STATE_OFF:
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value = 0x30;
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break;
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default:
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return;
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}
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via_write_reg_mask(VIACR, 0x36, value, 0x30);
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}
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static void set_96_state(u8 state)
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{
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u8 value;
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switch (state) {
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case VIA_STATE_ON:
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value = 0xC0;
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break;
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case VIA_STATE_OFF:
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value = 0x00;
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break;
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default:
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return;
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}
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via_write_reg_mask(VIASR, 0x1E, value, 0xC0);
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}
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static void set_dvp1_state(u8 state)
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{
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u8 value;
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switch (state) {
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case VIA_STATE_ON:
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value = 0x30;
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break;
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case VIA_STATE_OFF:
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value = 0x00;
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break;
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default:
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return;
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}
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via_write_reg_mask(VIASR, 0x1E, value, 0x30);
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}
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static void set_lvds1_state(u8 state)
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{
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u8 value;
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switch (state) {
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case VIA_STATE_ON:
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value = 0x03;
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break;
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case VIA_STATE_OFF:
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value = 0x00;
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break;
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default:
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return;
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}
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via_write_reg_mask(VIASR, 0x2A, value, 0x03);
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}
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static void set_lvds2_state(u8 state)
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{
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u8 value;
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switch (state) {
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case VIA_STATE_ON:
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value = 0x0C;
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break;
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case VIA_STATE_OFF:
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value = 0x00;
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break;
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default:
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return;
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}
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via_write_reg_mask(VIASR, 0x2A, value, 0x0C);
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}
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void via_set_state(u32 devices, u8 state)
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{
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/*
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TODO: Can we enable/disable these devices? How?
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if (devices & VIA_6C)
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if (devices & VIA_93)
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*/
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if (devices & VIA_96)
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set_96_state(state);
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if (devices & VIA_CRT)
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set_crt_state(state);
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if (devices & VIA_DVP1)
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set_dvp1_state(state);
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if (devices & VIA_LVDS1)
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set_lvds1_state(state);
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if (devices & VIA_LVDS2)
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set_lvds2_state(state);
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}
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u32 via_parse_odev(char *input, char **end)
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{
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char *ptr = input;
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@ -2224,6 +2339,8 @@ int viafb_setmode(struct VideoModeTable *vmode_tbl, int video_bpp,
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{
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int i, j;
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int port;
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u32 devices = viaparinfo->shared->iga1_devices
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| viaparinfo->shared->iga2_devices;
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u8 value, index, mask;
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struct crt_mode_table *crt_timing;
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struct crt_mode_table *crt_timing1 = NULL;
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@ -2271,6 +2388,7 @@ int viafb_setmode(struct VideoModeTable *vmode_tbl, int video_bpp,
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}
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device_off();
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via_set_state(devices, VIA_STATE_OFF);
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/* Fill VPIT Parameters */
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/* Write Misc Register */
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@ -2430,6 +2548,7 @@ int viafb_setmode(struct VideoModeTable *vmode_tbl, int video_bpp,
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viafb_DeviceStatus = CRT_Device;
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}
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device_on();
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via_set_state(devices, VIA_STATE_ON);
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device_screen_on();
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return 1;
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}
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@ -2470,31 +2589,18 @@ int viafb_get_refresh(int hres, int vres, u32 long_refresh)
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static void device_off(void)
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{
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viafb_crt_disable();
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viafb_dvi_disable();
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viafb_lcd_disable();
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}
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static void device_on(void)
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{
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if (viafb_CRT_ON == 1)
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viafb_crt_enable();
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if (viafb_DVI_ON == 1)
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viafb_dvi_enable();
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if (viafb_LCD_ON == 1)
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viafb_lcd_enable();
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}
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void viafb_crt_disable(void)
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{
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viafb_write_reg_mask(CR36, VIACR, BIT5 + BIT4, BIT5 + BIT4);
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}
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void viafb_crt_enable(void)
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{
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viafb_write_reg_mask(CR36, VIACR, 0x0, BIT5 + BIT4);
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}
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static void enable_second_display_channel(void)
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{
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/* to enable second display channel. */
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@ -41,6 +41,12 @@
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#define VIA_LVDS1 0x00000040
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#define VIA_LVDS2 0x00000080
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/* VIA output device power states */
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#define VIA_STATE_ON 0
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#define VIA_STATE_STANDBY 1
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#define VIA_STATE_SUSPEND 2
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#define VIA_STATE_OFF 3
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/***************************************************
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* Definition IGA1 Design Method of CRTC Registers *
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****************************************************/
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@ -904,9 +910,8 @@ void viafb_set_vclock(u32 CLK, int set_iga);
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void viafb_load_reg(int timing_value, int viafb_load_reg_num,
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struct io_register *reg,
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int io_type);
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void viafb_crt_disable(void);
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void viafb_crt_enable(void);
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void via_set_source(u32 devices, u8 iga);
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void via_set_state(u32 devices, u8 state);
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u32 via_parse_odev(char *input, char **end);
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void via_odev_to_seq(struct seq_file *m, u32 odev);
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void init_ad9389(void);
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@ -703,9 +703,6 @@ static void integrated_lvds_disable(struct lvds_setting_information
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viafb_write_reg_mask(CR91, VIACR, 0xC0, BIT6 + BIT7);
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}
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/* Turn DFP High/Low Pad off. */
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viafb_write_reg_mask(SR2A, VIASR, 0, BIT0 + BIT1 + BIT2 + BIT3);
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/* Power off LVDS channel. */
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switch (plvds_chip_info->output_interface) {
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case INTERFACE_LVDS0:
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@ -761,9 +758,6 @@ static void integrated_lvds_enable(struct lvds_setting_information
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break;
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}
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/* Turn DFP High/Low pad on. */
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viafb_write_reg_mask(SR2A, VIASR, 0x0F, BIT0 + BIT1 + BIT2 + BIT3);
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/* Power on LVDS channel. */
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switch (plvds_chip_info->output_interface) {
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case INTERFACE_LVDS0:
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@ -812,8 +806,6 @@ void viafb_lcd_disable(void)
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viafb_disable_lvds_vt1636(viaparinfo->lvds_setting_info,
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&viaparinfo->chip_info->lvds_chip_info);
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} else {
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/* DFP-HL pad off */
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viafb_write_reg_mask(SR2A, VIASR, 0x00, 0x0F);
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/* Backlight off */
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viafb_write_reg_mask(SR3D, VIASR, 0x00, 0x20);
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/* 24 bit DI data paht off */
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@ -879,8 +871,6 @@ void viafb_lcd_enable(void)
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viafb_enable_lvds_vt1636(viaparinfo->lvds_setting_info,
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&viaparinfo->chip_info->lvds_chip_info);
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} else {
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/* DFP-HL pad on */
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viafb_write_reg_mask(SR2A, VIASR, 0x0F, 0x0F);
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/* Backlight on */
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viafb_write_reg_mask(SR3D, VIASR, 0x20, 0x20);
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/* 24 bit DI data paht on */
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@ -332,22 +332,22 @@ static int viafb_blank(int blank_mode, struct fb_info *info)
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case FB_BLANK_UNBLANK:
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/* Screen: On, HSync: On, VSync: On */
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/* control CRT monitor power management */
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viafb_write_reg_mask(CR36, VIACR, 0x00, BIT4 + BIT5);
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via_set_state(VIA_CRT, VIA_STATE_ON);
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break;
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case FB_BLANK_HSYNC_SUSPEND:
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/* Screen: Off, HSync: Off, VSync: On */
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/* control CRT monitor power management */
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viafb_write_reg_mask(CR36, VIACR, 0x10, BIT4 + BIT5);
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via_set_state(VIA_CRT, VIA_STATE_STANDBY);
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break;
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case FB_BLANK_VSYNC_SUSPEND:
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/* Screen: Off, HSync: On, VSync: Off */
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/* control CRT monitor power management */
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viafb_write_reg_mask(CR36, VIACR, 0x20, BIT4 + BIT5);
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via_set_state(VIA_CRT, VIA_STATE_SUSPEND);
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break;
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case FB_BLANK_POWERDOWN:
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/* Screen: Off, HSync: Off, VSync: Off */
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/* control CRT monitor power management */
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viafb_write_reg_mask(CR36, VIACR, 0x30, BIT4 + BIT5);
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via_set_state(VIA_CRT, VIA_STATE_OFF);
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break;
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}
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@ -457,7 +457,7 @@ static int viafb_ioctl(struct fb_info *info, u_int cmd, u_long arg)
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if (copy_from_user(&gpu32, argp, sizeof(gpu32)))
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return -EFAULT;
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if (gpu32 & CRT_Device)
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viafb_crt_enable();
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via_set_state(VIA_CRT, VIA_STATE_ON);
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if (gpu32 & DVI_Device)
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viafb_dvi_enable();
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if (gpu32 & LCD_Device)
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@ -467,7 +467,7 @@ static int viafb_ioctl(struct fb_info *info, u_int cmd, u_long arg)
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if (copy_from_user(&gpu32, argp, sizeof(gpu32)))
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return -EFAULT;
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if (gpu32 & CRT_Device)
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viafb_crt_disable();
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via_set_state(VIA_CRT, VIA_STATE_OFF);
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if (gpu32 & DVI_Device)
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viafb_dvi_disable();
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if (gpu32 & LCD_Device)
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@ -1487,7 +1487,9 @@ static ssize_t viafb_iga1_odev_proc_write(struct file *file,
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dev_on = dev_new & ~dev_old;
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viaparinfo->shared->iga1_devices = dev_new;
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viaparinfo->shared->iga2_devices &= ~dev_new;
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via_set_state(dev_off, VIA_STATE_OFF);
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via_set_source(dev_new, IGA1);
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via_set_state(dev_on, VIA_STATE_ON);
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return res;
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}
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@ -1525,7 +1527,9 @@ static ssize_t viafb_iga2_odev_proc_write(struct file *file,
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dev_on = dev_new & ~dev_old;
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viaparinfo->shared->iga2_devices = dev_new;
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viaparinfo->shared->iga1_devices &= ~dev_new;
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via_set_state(dev_off, VIA_STATE_OFF);
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via_set_source(dev_new, IGA2);
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via_set_state(dev_on, VIA_STATE_ON);
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return res;
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}
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@ -92,34 +92,6 @@ void viafb_enable_lvds_vt1636(struct lvds_setting_information
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viafb_gpio_i2c_write_mask_lvds(plvds_setting_info, plvds_chip_info,
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VDD_ON_TBL_VT1636[0]);
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/* Pad on: */
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switch (plvds_chip_info->output_interface) {
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case INTERFACE_DVP0:
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{
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viafb_write_reg_mask(SR1E, VIASR, 0xC0, 0xC0);
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break;
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}
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case INTERFACE_DVP1:
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{
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viafb_write_reg_mask(SR1E, VIASR, 0x30, 0x30);
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break;
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}
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case INTERFACE_DFP_LOW:
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{
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viafb_write_reg_mask(SR2A, VIASR, 0x03, 0x03);
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break;
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}
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case INTERFACE_DFP_HIGH:
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{
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viafb_write_reg_mask(SR2A, VIASR, 0x03, 0x0C);
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break;
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}
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}
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}
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void viafb_disable_lvds_vt1636(struct lvds_setting_information
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@ -129,34 +101,6 @@ void viafb_disable_lvds_vt1636(struct lvds_setting_information
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viafb_gpio_i2c_write_mask_lvds(plvds_setting_info, plvds_chip_info,
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VDD_OFF_TBL_VT1636[0]);
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/* Pad off: */
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switch (plvds_chip_info->output_interface) {
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case INTERFACE_DVP0:
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{
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viafb_write_reg_mask(SR1E, VIASR, 0x00, 0xC0);
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break;
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}
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case INTERFACE_DVP1:
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{
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viafb_write_reg_mask(SR1E, VIASR, 0x00, 0x30);
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break;
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}
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case INTERFACE_DFP_LOW:
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{
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viafb_write_reg_mask(SR2A, VIASR, 0x00, 0x03);
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break;
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}
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case INTERFACE_DFP_HIGH:
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{
|
||||
viafb_write_reg_mask(SR2A, VIASR, 0x00, 0x0C);
|
||||
break;
|
||||
}
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
bool viafb_lvds_identify_vt1636(u8 i2c_adapter)
|
||||
|
Loading…
Reference in New Issue
Block a user