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drm/nvc0-/gr: tpc regs a subset of gpc, add separate list for gpc/unk regs

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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
Ben Skeggs 2013-07-01 14:48:33 +10:00
parent 5ee86c4190
commit 70f824ac8c
8 changed files with 52 additions and 34 deletions
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13
drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc0.c
View File

@ -1047,11 +1047,10 @@ nvc0_grctx_generate_main(struct nvc0_graph_priv *priv, struct nvc0_grctx *info)
nv_mask(priv, 0x000260, 0x00000001, 0x00000000);
for (i = 0; oclass->mmio[i]; i++)
nvc0_graph_mmio(priv, oclass->mmio[i]);
for (i = 0; oclass->hub[i]; i++)
nvc0_graph_mmio(priv, oclass->hub[i]);
for (i = 0; oclass->gpc[i]; i++)
nvc0_graph_mmio(priv, oclass->gpc[i]);
nvc0_graph_mmio(priv, oclass->tpc);
nv_wr32(priv, 0x404154, 0x00000000);
@ -1179,7 +1178,7 @@ done:
}
struct nvc0_graph_init *
nvc0_grctx_init_mmio[] = {
nvc0_grctx_init_hub[] = {
nvc0_grctx_init_base,
nvc0_grctx_init_unk40xx,
nvc0_grctx_init_unk44xx,
@ -1194,10 +1193,11 @@ nvc0_grctx_init_mmio[] = {
NULL
};
struct nvc0_graph_init *
static struct nvc0_graph_init *
nvc0_grctx_init_gpc[] = {
nvc0_grctx_init_gpc_0,
nvc0_grctx_init_gpc_1,
nvc0_grctx_init_tpc,
NULL
};
@ -1230,9 +1230,8 @@ nvc0_grctx_oclass = &(struct nvc0_grctx_oclass) {
},
.main = nvc0_grctx_generate_main,
.mods = nvc0_grctx_generate_mods,
.mmio = nvc0_grctx_init_mmio,
.hub = nvc0_grctx_init_hub,
.gpc = nvc0_grctx_init_gpc,
.tpc = nvc0_grctx_init_tpc,
.icmd = nvc0_grctx_init_icmd,
.mthd = nvc0_grctx_init_mthd,
}.base;

6
drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc1.c
View File

@ -757,7 +757,7 @@ nvc1_grctx_generate_mods(struct nvc0_graph_priv *priv, struct nvc0_grctx *info)
}
static struct nvc0_graph_init *
nvc1_grctx_init_mmio[] = {
nvc1_grctx_init_hub[] = {
nvc0_grctx_init_base,
nvc0_grctx_init_unk40xx,
nvc0_grctx_init_unk44xx,
@ -776,6 +776,7 @@ struct nvc0_graph_init *
nvc1_grctx_init_gpc[] = {
nvc1_grctx_init_gpc_0,
nvc0_grctx_init_gpc_1,
nvc1_grctx_init_tpc,
NULL
};
@ -803,9 +804,8 @@ nvc1_grctx_oclass = &(struct nvc0_grctx_oclass) {
},
.main = nvc0_grctx_generate_main,
.mods = nvc1_grctx_generate_mods,
.mmio = nvc1_grctx_init_mmio,
.hub = nvc1_grctx_init_hub,
.gpc = nvc1_grctx_init_gpc,
.tpc = nvc1_grctx_init_tpc,
.icmd = nvc1_grctx_init_icmd,
.mthd = nvc1_grctx_init_mthd,
}.base;

13
drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc3.c
View File

@ -70,6 +70,14 @@ nvc3_grctx_init_tpc[] = {
{}
};
struct nvc0_graph_init *
nvc3_grctx_init_gpc[] = {
nvc0_grctx_init_gpc_0,
nvc0_grctx_init_gpc_1,
nvc3_grctx_init_tpc,
NULL
};
struct nouveau_oclass *
nvc3_grctx_oclass = &(struct nvc0_grctx_oclass) {
.base.handle = NV_ENGCTX(GR, 0xc3),
@ -83,9 +91,8 @@ nvc3_grctx_oclass = &(struct nvc0_grctx_oclass) {
},
.main = nvc0_grctx_generate_main,
.mods = nvc0_grctx_generate_mods,
.mmio = nvc0_grctx_init_mmio,
.gpc = nvc0_grctx_init_gpc,
.tpc = nvc3_grctx_init_tpc,
.hub = nvc0_grctx_init_hub,
.gpc = nvc3_grctx_init_gpc,
.icmd = nvc0_grctx_init_icmd,
.mthd = nvc0_grctx_init_mthd,
}.base;

13
drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc8.c
View File

@ -341,6 +341,14 @@ nvc8_grctx_init_mthd[] = {
{}
};
static struct nvc0_graph_init *
nvc8_grctx_init_gpc[] = {
nvc0_grctx_init_gpc_0,
nvc0_grctx_init_gpc_1,
nvc8_grctx_init_tpc,
NULL
};
struct nouveau_oclass *
nvc8_grctx_oclass = &(struct nvc0_grctx_oclass) {
.base.handle = NV_ENGCTX(GR, 0xc8),
@ -354,9 +362,8 @@ nvc8_grctx_oclass = &(struct nvc0_grctx_oclass) {
},
.main = nvc0_grctx_generate_main,
.mods = nvc0_grctx_generate_mods,
.mmio = nvc0_grctx_init_mmio,
.gpc = nvc0_grctx_init_gpc,
.tpc = nvc8_grctx_init_tpc,
.hub = nvc0_grctx_init_hub,
.gpc = nvc8_grctx_init_gpc,
.icmd = nvc8_grctx_init_icmd,
.mthd = nvc8_grctx_init_mthd,
}.base;

6
drivers/gpu/drm/nouveau/core/engine/graph/ctxnvd9.c
View File

@ -454,7 +454,7 @@ nvd9_grctx_init_tpc[] = {
};
static struct nvc0_graph_init *
nvd9_grctx_init_mmio[] = {
nvd9_grctx_init_hub[] = {
nvc0_grctx_init_base,
nvd9_grctx_init_unk40xx,
nvc0_grctx_init_unk44xx,
@ -472,6 +472,7 @@ struct nvc0_graph_init *
nvd9_grctx_init_gpc[] = {
nvd9_grctx_init_gpc_0,
nvc0_grctx_init_gpc_1,
nvd9_grctx_init_tpc,
NULL
};
@ -506,9 +507,8 @@ nvd9_grctx_oclass = &(struct nvc0_grctx_oclass) {
},
.main = nvc0_grctx_generate_main,
.mods = nvc1_grctx_generate_mods,
.mmio = nvd9_grctx_init_mmio,
.hub = nvd9_grctx_init_hub,
.gpc = nvd9_grctx_init_gpc,
.tpc = nvd9_grctx_init_tpc,
.icmd = nvd9_grctx_init_icmd,
.mthd = nvd9_grctx_init_mthd,
}.base;

17
drivers/gpu/drm/nouveau/core/engine/graph/ctxnve4.c
View File

@ -783,7 +783,11 @@ nve4_grctx_init_tpc[] = {
{ 0x419f70, 1, 0x04, 0x00000000 },
{ 0x419f78, 1, 0x04, 0x0000000b },
{ 0x419f7c, 1, 0x04, 0x0000027a },
{}
};
static struct nvc0_graph_init
nve4_grctx_init_unk[] = {
{ 0x41be24, 1, 0x04, 0x00000006 },
{ 0x41bec0, 1, 0x04, 0x12180000 },
{ 0x41bec4, 1, 0x04, 0x00037f7f },
@ -797,7 +801,6 @@ nve4_grctx_init_tpc[] = {
{ 0x41bfd0, 1, 0x04, 0x00900103 },
{ 0x41bfe0, 1, 0x04, 0x00400001 },
{ 0x41bfe4, 1, 0x04, 0x00000000 },
{}
};
@ -911,11 +914,10 @@ nve4_grctx_generate_main(struct nvc0_graph_priv *priv, struct nvc0_grctx *info)
nv_mask(priv, 0x000260, 0x00000001, 0x00000000);
for (i = 0; oclass->mmio[i]; i++)
nvc0_graph_mmio(priv, oclass->mmio[i]);
for (i = 0; oclass->hub[i]; i++)
nvc0_graph_mmio(priv, oclass->hub[i]);
for (i = 0; oclass->gpc[i]; i++)
nvc0_graph_mmio(priv, oclass->gpc[i]);
nvc0_graph_mmio(priv, oclass->tpc);
nv_wr32(priv, 0x404154, 0x00000000);
@ -964,7 +966,7 @@ nve4_grctx_generate_main(struct nvc0_graph_priv *priv, struct nvc0_grctx *info)
}
static struct nvc0_graph_init *
nve4_grctx_init_mmio[] = {
nve4_grctx_init_hub[] = {
nvc0_grctx_init_base,
nve4_grctx_init_unk40xx,
nvc0_grctx_init_unk44xx,
@ -985,6 +987,8 @@ struct nvc0_graph_init *
nve4_grctx_init_gpc[] = {
nve4_grctx_init_gpc_0,
nvc0_grctx_init_gpc_1,
nve4_grctx_init_tpc,
nve4_grctx_init_unk,
NULL
};
@ -1009,9 +1013,8 @@ nve4_grctx_oclass = &(struct nvc0_grctx_oclass) {
},
.main = nve4_grctx_generate_main,
.mods = nve4_grctx_generate_mods,
.mmio = nve4_grctx_init_mmio,
.hub = nve4_grctx_init_hub,
.gpc = nve4_grctx_init_gpc,
.tpc = nve4_grctx_init_tpc,
.icmd = nve4_grctx_init_icmd,
.mthd = nve4_grctx_init_mthd,
}.base;

12
drivers/gpu/drm/nouveau/core/engine/graph/ctxnvf0.c
View File

@ -200,7 +200,11 @@ nvf0_grctx_init_tpc[] = {
{ 0x419f70, 1, 0x04, 0x00007300 },
{ 0x419f78, 1, 0x04, 0x000000eb },
{ 0x419f7c, 1, 0x04, 0x00000404 },
{}
};
static struct nvc0_graph_init
nvf0_grctx_init_unk[] = {
{ 0x41be24, 1, 0x04, 0x00000006 },
{ 0x41bec0, 1, 0x04, 0x10000000 },
{ 0x41bec4, 1, 0x04, 0x00037f7f },
@ -214,12 +218,11 @@ nvf0_grctx_init_tpc[] = {
{ 0x41bfd0, 1, 0x04, 0x00900103 },
{ 0x41bfe0, 1, 0x04, 0x00400001 },
{ 0x41bfe4, 1, 0x04, 0x00000000 },
{}
};
static struct nvc0_graph_init *
nvf0_grctx_init_mmio[] = {
nvf0_grctx_init_hub[] = {
nvc0_grctx_init_base,
nvf0_grctx_init_unk40xx,
nvf0_grctx_init_unk44xx,
@ -239,6 +242,8 @@ struct nvc0_graph_init *
nvf0_grctx_init_gpc[] = {
nvf0_grctx_init_gpc_0,
nvc0_grctx_init_gpc_1,
nvf0_grctx_init_tpc,
nvf0_grctx_init_unk,
NULL
};
@ -263,9 +268,8 @@ nvf0_grctx_oclass = &(struct nvc0_grctx_oclass) {
},
.main = nve4_grctx_generate_main,
.mods = nve4_grctx_generate_mods,
.mmio = nvf0_grctx_init_mmio,
.hub = nvf0_grctx_init_hub,
.gpc = nvf0_grctx_init_gpc,
.tpc = nvf0_grctx_init_tpc,
.icmd = nvc0_grctx_init_icmd,
.mthd = nvf0_grctx_init_mthd,
}.base;

6
drivers/gpu/drm/nouveau/core/engine/graph/nvc0.h
View File

@ -151,9 +151,8 @@ struct nvc0_grctx_oclass {
/* context-specific modify-on-first-load list generation function */
void (*mods)(struct nvc0_graph_priv *, struct nvc0_grctx *);
/* mmio context data */
struct nvc0_graph_init **mmio;
struct nvc0_graph_init **hub;
struct nvc0_graph_init **gpc;
struct nvc0_graph_init *tpc;
/* indirect context data, generated with icmds/mthds */
struct nvc0_graph_init *icmd;
struct nvc0_graph_mthd *mthd;
@ -213,7 +212,7 @@ void nvc0_grctx_generate_r418bb8(struct nvc0_graph_priv *);
void nvc0_grctx_generate_r406800(struct nvc0_graph_priv *);
extern struct nouveau_oclass *nvc0_grctx_oclass;
extern struct nvc0_graph_init *nvc0_grctx_init_mmio[];
extern struct nvc0_graph_init *nvc0_grctx_init_hub[];
extern struct nvc0_graph_init nvc0_grctx_init_base[];
extern struct nvc0_graph_init nvc0_grctx_init_unk40xx[];
extern struct nvc0_graph_init nvc0_grctx_init_unk44xx[];
@ -225,7 +224,6 @@ extern struct nvc0_graph_init nvc0_grctx_init_unk78xx[];
extern struct nvc0_graph_init nvc0_grctx_init_unk80xx[];
extern struct nvc0_graph_init nvc0_grctx_init_gpc_0[];
extern struct nvc0_graph_init nvc0_grctx_init_gpc_1[];
extern struct nvc0_graph_init *nvc0_grctx_init_gpc[];
extern struct nvc0_graph_init nvc0_grctx_init_tpc[];
extern struct nvc0_graph_init nvc0_grctx_init_icmd[];
extern struct nvc0_graph_init nvd9_grctx_init_icmd[]; //