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Merge git://git.infradead.org/mtd-2.6
* git://git.infradead.org/mtd-2.6: mtd/nand_ids: Fix buswidth mtd/m25p80: fix test for end of loop mtd/m25p80: retlen is never NULL MIPS: Fix gen_nand probe structures contents gen_nand: Test if nr_chips field is valid BFIN: Fix gen_nand probe structures contents nand/denali: move all hardware initialization work to denali_hw_init nand/denali: Add a page check in denali_read_page & denali_read_page_raw nand/denali: use cpu_relax() while waiting for hardware interrupt nand/denali: change read_status function method nand/denali: Fixed check patch warnings ARM: Fix gen_nand probe structures contents mtd/nand_base: fix kernel-doc warnings & typos nand/denali: use dev_xx debug function to replace nand_dbg_print and some printk nand/denali: Fixed handle ECC error bugs nand/denali: use iowrite32() to replace denali_write32() nand/denali: Fixed probe function bugs
This commit is contained in:
commit
7355a5a654
@ -100,6 +100,7 @@ ixdp425_flash_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
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static struct platform_nand_data ixdp425_flash_nand_data = {
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.chip = {
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.nr_chips = 1,
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.chip_delay = 30,
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.options = NAND_NO_AUTOINCR,
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#ifdef CONFIG_MTD_PARTITIONS
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@ -165,6 +165,7 @@ static void qong_nand_select_chip(struct mtd_info *mtd, int chip)
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static struct platform_nand_data qong_nand_data = {
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.chip = {
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.nr_chips = 1,
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.chip_delay = 20,
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.options = 0,
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},
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@ -216,6 +216,7 @@ static struct mtd_partition ts78xx_ts_nand_parts[] = {
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static struct platform_nand_data ts78xx_ts_nand_data = {
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.chip = {
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.nr_chips = 1,
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.part_probe_types = ts_nand_part_probes,
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.partitions = ts78xx_ts_nand_parts,
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.nr_partitions = ARRAY_SIZE(ts78xx_ts_nand_parts),
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@ -400,6 +400,7 @@ static int bfin_plat_nand_dev_ready(struct mtd_info *mtd)
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static struct platform_nand_data bfin_plat_nand_data = {
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.chip = {
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.nr_chips = 1,
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.chip_delay = 30,
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#ifdef CONFIG_MTD_PARTITIONS
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.part_probe_types = part_probes,
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@ -284,6 +284,7 @@ static int bfin_plat_nand_dev_ready(struct mtd_info *mtd)
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static struct platform_nand_data bfin_plat_nand_data = {
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.chip = {
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.nr_chips = 1,
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.chip_delay = 30,
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#ifdef CONFIG_MTD_PARTITIONS
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.part_probe_types = part_probes,
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@ -266,6 +266,7 @@ pnx833x_flash_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
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static struct platform_nand_data pnx833x_flash_nand_data = {
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.chip = {
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.nr_chips = 1,
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.chip_delay = 25,
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.part_probe_types = part_probes,
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},
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@ -347,8 +347,7 @@ static int m25p80_read(struct mtd_info *mtd, loff_t from, size_t len,
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spi_message_add_tail(&t[1], &m);
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/* Byte count starts at zero. */
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if (retlen)
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*retlen = 0;
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*retlen = 0;
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mutex_lock(&flash->lock);
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@ -394,8 +393,7 @@ static int m25p80_write(struct mtd_info *mtd, loff_t to, size_t len,
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dev_name(&flash->spi->dev), __func__, "to",
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(u32)to, len);
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if (retlen)
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*retlen = 0;
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*retlen = 0;
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/* sanity checks */
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if (!len)
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@ -466,8 +464,7 @@ static int m25p80_write(struct mtd_info *mtd, loff_t to, size_t len,
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spi_sync(flash->spi, &m);
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if (retlen)
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*retlen += m.actual_length - m25p_cmdsz(flash);
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*retlen += m.actual_length - m25p_cmdsz(flash);
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}
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}
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@ -485,8 +482,7 @@ static int sst_write(struct mtd_info *mtd, loff_t to, size_t len,
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size_t actual;
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int cmd_sz, ret;
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if (retlen)
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*retlen = 0;
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*retlen = 0;
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/* sanity checks */
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if (!len)
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@ -797,7 +793,7 @@ static int __devinit m25p_probe(struct spi_device *spi)
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break;
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}
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if (plat_id)
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if (i < ARRAY_SIZE(m25p_ids) - 1)
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id = plat_id;
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else
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dev_warn(&spi->dev, "unrecognized id %s\n", data->type);
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File diff suppressed because it is too large
Load Diff
@ -635,24 +635,6 @@
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#define CLK_X 5
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#define CLK_MULTI 4
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/* ffsport.h */
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#define VERBOSE 1
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#define NAND_DBG_WARN 1
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#define NAND_DBG_DEBUG 2
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#define NAND_DBG_TRACE 3
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#ifdef VERBOSE
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#define nand_dbg_print(level, args...) \
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do { \
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if (level <= nand_debug_level) \
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printk(KERN_ALERT args); \
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} while (0)
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#else
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#define nand_dbg_print(level, args...)
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#endif
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/* spectraswconfig.h */
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#define CMD_DMA 0
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@ -112,7 +112,7 @@ struct nand_flash_dev nand_flash_ids[] = {
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{"NAND 2GiB 3,3V 16-bit", 0xC5, 0, 2048, 0, LP_OPTIONS16},
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/* 32 Gigabit */
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{"NAND 4GiB 3,3V 8-bit", 0xD7, 0, 4096, 0, LP_OPTIONS16},
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{"NAND 4GiB 3,3V 8-bit", 0xD7, 0, 4096, 0, LP_OPTIONS},
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/*
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* Renesas AND 1 Gigabit. Those chips do not support extended id and
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@ -37,6 +37,11 @@ static int __devinit plat_nand_probe(struct platform_device *pdev)
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struct resource *res;
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int err = 0;
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if (pdata->chip.nr_chips < 1) {
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dev_err(&pdev->dev, "invalid number of chips specified\n");
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return -EINVAL;
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}
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res)
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return -ENXIO;
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