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MIPS: Oceton: Update model detection code for new chips.
Several newer chips were not covered, update the code to detect them. This necessitates updating cvmx-mio-defs.h as well, because it has new and required definitions. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2939/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
David Daney
Ralf Baechle
parent
506d24be55
commit
751c9f6849
@ -4,7 +4,7 @@
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* Contact: support@caviumnetworks.com
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* This file is part of the OCTEON SDK
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*
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* Copyright (c) 2003-2008 Cavium Networks
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* Copyright (c) 2003-2010 Cavium Networks
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*
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* This file is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, Version 2, as
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@ -25,10 +25,6 @@
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* Contact Cavium Networks for more information
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***********************license end**************************************/
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/*
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* File defining functions for working with different Octeon
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* models.
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*/
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#include <asm/octeon/octeon.h>
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/**
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@ -69,11 +65,12 @@ const char *octeon_model_get_string_buffer(uint32_t chip_id, char *buffer)
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char fuse_model[10];
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uint32_t fuse_data = 0;
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fus3.u64 = cvmx_read_csr(CVMX_L2D_FUS3);
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fus3.u64 = 0;
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if (!OCTEON_IS_MODEL(OCTEON_CN6XXX))
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fus3.u64 = cvmx_read_csr(CVMX_L2D_FUS3);
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fus_dat2.u64 = cvmx_read_csr(CVMX_MIO_FUS_DAT2);
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fus_dat3.u64 = cvmx_read_csr(CVMX_MIO_FUS_DAT3);
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num_cores = cvmx_octeon_num_cores();
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num_cores = cvmx_pop(cvmx_read_csr(CVMX_CIU_FUSE));
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/* Make sure the non existent devices look disabled */
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switch ((chip_id >> 8) & 0xff) {
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@ -108,7 +105,7 @@ const char *octeon_model_get_string_buffer(uint32_t chip_id, char *buffer)
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* Assume pass number is encoded using <5:3><2:0>. Exceptions
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* will be fixed later.
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*/
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sprintf(pass, "%u.%u", ((chip_id >> 3) & 7) + 1, chip_id & 7);
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sprintf(pass, "%d.%d", (int)((chip_id >> 3) & 7) + 1, (int)chip_id & 7);
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/*
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* Use the number of cores to determine the last 2 digits of
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@ -116,6 +113,12 @@ const char *octeon_model_get_string_buffer(uint32_t chip_id, char *buffer)
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* later.
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*/
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switch (num_cores) {
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case 32:
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core_model = "80";
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break;
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case 24:
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core_model = "70";
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break;
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case 16:
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core_model = "60";
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break;
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@ -246,8 +249,8 @@ const char *octeon_model_get_string_buffer(uint32_t chip_id, char *buffer)
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break;
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case 3: /* CN58XX */
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family = "58";
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/* Special case. 4 core, no crypto */
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if ((num_cores == 4) && fus_dat2.cn38xx.nocrypto)
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/* Special case. 4 core, half cache (CP with half cache) */
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if ((num_cores == 4) && fus3.cn58xx.crip_1024k && !strncmp(suffix, "CP", 2))
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core_model = "29";
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/* Pass 1 uses different encodings for pass numbers */
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@ -285,6 +288,9 @@ const char *octeon_model_get_string_buffer(uint32_t chip_id, char *buffer)
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suffix = "NSP";
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if (fus_dat3.s.nozip)
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suffix = "SCP";
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if (fus_dat3.s.bar2_en)
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suffix = "NSPB2";
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}
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if (fus3.cn56xx.crip_1024k)
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family = "54";
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@ -301,6 +307,60 @@ const char *octeon_model_get_string_buffer(uint32_t chip_id, char *buffer)
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else
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family = "52";
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break;
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case 0x93: /* CN61XX */
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family = "61";
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if (fus_dat2.cn61xx.nocrypto && fus_dat2.cn61xx.dorm_crypto)
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suffix = "AP";
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if (fus_dat2.cn61xx.nocrypto)
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suffix = "CP";
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else if (fus_dat2.cn61xx.dorm_crypto)
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suffix = "DAP";
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else if (fus_dat3.cn61xx.nozip)
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suffix = "SCP";
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break;
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case 0x90: /* CN63XX */
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family = "63";
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if (fus_dat3.s.l2c_crip == 2)
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family = "62";
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if (num_cores == 6) /* Other core counts match generic */
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core_model = "35";
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if (fus_dat2.cn63xx.nocrypto)
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suffix = "CP";
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else if (fus_dat2.cn63xx.dorm_crypto)
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suffix = "DAP";
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else if (fus_dat3.cn63xx.nozip)
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suffix = "SCP";
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else
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suffix = "AAP";
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break;
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case 0x92: /* CN66XX */
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family = "66";
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if (num_cores == 6) /* Other core counts match generic */
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core_model = "35";
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if (fus_dat2.cn66xx.nocrypto && fus_dat2.cn66xx.dorm_crypto)
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suffix = "AP";
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if (fus_dat2.cn66xx.nocrypto)
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suffix = "CP";
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else if (fus_dat2.cn66xx.dorm_crypto)
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suffix = "DAP";
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else if (fus_dat3.cn66xx.nozip)
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suffix = "SCP";
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else
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suffix = "AAP";
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break;
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case 0x91: /* CN68XX */
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family = "68";
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if (fus_dat2.cn68xx.nocrypto && fus_dat3.cn68xx.nozip)
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suffix = "CP";
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else if (fus_dat2.cn68xx.dorm_crypto)
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suffix = "DAP";
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else if (fus_dat3.cn68xx.nozip)
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suffix = "SCP";
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else if (fus_dat2.cn68xx.nocrypto)
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suffix = "SP";
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else
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suffix = "AAP";
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break;
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default:
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family = "XX";
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core_model = "XX";
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@ -310,49 +370,40 @@ const char *octeon_model_get_string_buffer(uint32_t chip_id, char *buffer)
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}
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clock_mhz = octeon_get_clock_rate() / 1000000;
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if (family[0] != '3') {
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int fuse_base = 384 / 8;
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if (family[0] == '6')
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fuse_base = 832 / 8;
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/* Check for model in fuses, overrides normal decode */
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/* This is _not_ valid for Octeon CN3XXX models */
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fuse_data |= cvmx_fuse_read_byte(51);
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fuse_data |= cvmx_fuse_read_byte(fuse_base + 3);
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fuse_data = fuse_data << 8;
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fuse_data |= cvmx_fuse_read_byte(50);
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fuse_data |= cvmx_fuse_read_byte(fuse_base + 2);
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fuse_data = fuse_data << 8;
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fuse_data |= cvmx_fuse_read_byte(49);
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fuse_data |= cvmx_fuse_read_byte(fuse_base + 1);
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fuse_data = fuse_data << 8;
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fuse_data |= cvmx_fuse_read_byte(48);
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fuse_data |= cvmx_fuse_read_byte(fuse_base);
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if (fuse_data & 0x7ffff) {
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int model = fuse_data & 0x3fff;
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int suffix = (fuse_data >> 14) & 0x1f;
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if (suffix && model) {
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/*
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* Have both number and suffix in
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* fuses, so both
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*/
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sprintf(fuse_model, "%d%c",
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model, 'A' + suffix - 1);
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/* Have both number and suffix in fuses, so both */
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sprintf(fuse_model, "%d%c", model, 'A' + suffix - 1);
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core_model = "";
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family = fuse_model;
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} else if (suffix && !model) {
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/*
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* Only have suffix, so add suffix to
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* 'normal' model number.
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*/
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sprintf(fuse_model, "%s%c", core_model,
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'A' + suffix - 1);
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/* Only have suffix, so add suffix to 'normal' model number */
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sprintf(fuse_model, "%s%c", core_model, 'A' + suffix - 1);
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core_model = fuse_model;
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} else {
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/*
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* Don't have suffix, so just use
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* model from fuses.
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*/
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/* Don't have suffix, so just use model from fuses */
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sprintf(fuse_model, "%d", model);
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core_model = "";
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family = fuse_model;
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}
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}
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}
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sprintf(buffer, "CN%s%sp%s-%d-%s",
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family, core_model, pass, clock_mhz, suffix);
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sprintf(buffer, "CN%s%sp%s-%d-%s", family, core_model, pass, clock_mhz, suffix);
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return buffer;
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}
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File diff suppressed because it is too large
Load Diff
@ -4,7 +4,7 @@
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* Contact: support@caviumnetworks.com
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* This file is part of the OCTEON SDK
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*
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* Copyright (c) 2003-2008 Cavium Networks
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* Copyright (c) 2003-2010 Cavium Networks
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*
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* This file is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, Version 2, as
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@ -24,14 +24,6 @@
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* This file may also be available under a different license from Cavium.
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* Contact Cavium Networks for more information
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***********************license end**************************************/
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/*
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*
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* File defining different Octeon model IDs and macros to
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* compare them.
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*
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*/
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#ifndef __OCTEON_MODEL_H__
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#define __OCTEON_MODEL_H__
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@ -52,6 +44,8 @@
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* for internal use only, and may change without notice.
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*/
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#define OCTEON_FAMILY_MASK 0x00ffff00
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/* Flag bits in top byte */
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/* Ignores revision in model checks */
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#define OM_IGNORE_REVISION 0x01000000
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@ -63,21 +57,48 @@
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#define OM_IGNORE_MINOR_REVISION 0x08000000
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#define OM_FLAG_MASK 0xff000000
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#define OM_MATCH_5XXX_FAMILY_MODELS 0x20000000 /* Match all cn5XXX Octeon models. */
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#define OM_MATCH_6XXX_FAMILY_MODELS 0x40000000 /* Match all cn6XXX Octeon models. */
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/* Match all cn5XXX Octeon models. */
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#define OM_MATCH_5XXX_FAMILY_MODELS 0x20000000
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/* Match all cn6XXX Octeon models. */
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#define OM_MATCH_6XXX_FAMILY_MODELS 0x40000000
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/*
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* CN6XXX models with new revision encoding
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*/
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#define OCTEON_CN68XX_PASS1_0 0x000d9100
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#define OCTEON_CN68XX_PASS1_1 0x000d9101
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#define OCTEON_CN68XX_PASS1_2 0x000d9102
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#define OCTEON_CN68XX_PASS2_0 0x000d9108
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#define OCTEON_CN68XX (OCTEON_CN68XX_PASS2_0 | OM_IGNORE_REVISION)
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#define OCTEON_CN68XX_PASS1_X (OCTEON_CN68XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)
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#define OCTEON_CN68XX_PASS2_X (OCTEON_CN68XX_PASS2_0 | OM_IGNORE_MINOR_REVISION)
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#define OCTEON_CN68XX_PASS1 OCTEON_CN68XX_PASS1_X
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#define OCTEON_CN68XX_PASS2 OCTEON_CN68XX_PASS2_X
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#define OCTEON_CN66XX_PASS1_0 0x000d9200
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#define OCTEON_CN66XX_PASS1_2 0x000d9202
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#define OCTEON_CN66XX (OCTEON_CN66XX_PASS1_0 | OM_IGNORE_REVISION)
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#define OCTEON_CN66XX_PASS1_X (OCTEON_CN66XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)
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#define OCTEON_CN63XX_PASS1_0 0x000d9000
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#define OCTEON_CN63XX_PASS1_1 0x000d9001
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#define OCTEON_CN63XX_PASS1_2 0x000d9002
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#define OCTEON_CN63XX_PASS2_0 0x000d9008
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#define OCTEON_CN63XX_PASS2_1 0x000d9009
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#define OCTEON_CN63XX_PASS2_2 0x000d900a
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#define OCTEON_CN63XX (OCTEON_CN63XX_PASS2_0 | OM_IGNORE_REVISION)
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#define OCTEON_CN63XX_PASS1_X (OCTEON_CN63XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)
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#define OCTEON_CN63XX_PASS2_X (OCTEON_CN63XX_PASS2_0 | OM_IGNORE_MINOR_REVISION)
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#define OCTEON_CN61XX_PASS1_0 0x000d9300
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#define OCTEON_CN61XX (OCTEON_CN61XX_PASS1_0 | OM_IGNORE_REVISION)
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#define OCTEON_CN61XX_PASS1_X (OCTEON_CN61XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)
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/*
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* CN5XXX models with new revision encoding
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*/
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@ -90,10 +111,8 @@
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#define OCTEON_CN58XX_PASS2_3 0x000d030b
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#define OCTEON_CN58XX (OCTEON_CN58XX_PASS1_0 | OM_IGNORE_REVISION)
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#define OCTEON_CN58XX_PASS1_X (OCTEON_CN58XX_PASS1_0 \
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| OM_IGNORE_MINOR_REVISION)
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#define OCTEON_CN58XX_PASS2_X (OCTEON_CN58XX_PASS2_0 \
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| OM_IGNORE_MINOR_REVISION)
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#define OCTEON_CN58XX_PASS1_X (OCTEON_CN58XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)
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#define OCTEON_CN58XX_PASS2_X (OCTEON_CN58XX_PASS2_0 | OM_IGNORE_MINOR_REVISION)
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#define OCTEON_CN58XX_PASS1 OCTEON_CN58XX_PASS1_X
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#define OCTEON_CN58XX_PASS2 OCTEON_CN58XX_PASS2_X
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@ -103,10 +122,8 @@
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#define OCTEON_CN56XX_PASS2_1 0x000d0409
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#define OCTEON_CN56XX (OCTEON_CN56XX_PASS2_0 | OM_IGNORE_REVISION)
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#define OCTEON_CN56XX_PASS1_X (OCTEON_CN56XX_PASS1_0 \
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| OM_IGNORE_MINOR_REVISION)
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#define OCTEON_CN56XX_PASS2_X (OCTEON_CN56XX_PASS2_0 \
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| OM_IGNORE_MINOR_REVISION)
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#define OCTEON_CN56XX_PASS1_X (OCTEON_CN56XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)
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#define OCTEON_CN56XX_PASS2_X (OCTEON_CN56XX_PASS2_0 | OM_IGNORE_MINOR_REVISION)
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#define OCTEON_CN56XX_PASS1 OCTEON_CN56XX_PASS1_X
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#define OCTEON_CN56XX_PASS2 OCTEON_CN56XX_PASS2_X
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@ -125,8 +142,7 @@
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#define OCTEON_CN50XX_PASS1_0 0x000d0600
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#define OCTEON_CN50XX (OCTEON_CN50XX_PASS1_0 | OM_IGNORE_REVISION)
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#define OCTEON_CN50XX_PASS1_X (OCTEON_CN50XX_PASS1_0 \
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| OM_IGNORE_MINOR_REVISION)
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#define OCTEON_CN50XX_PASS1_X (OCTEON_CN50XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)
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#define OCTEON_CN50XX_PASS1 OCTEON_CN50XX_PASS1_X
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/*
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@ -138,10 +154,8 @@
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#define OCTEON_CN52XX_PASS2_0 0x000d0708
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#define OCTEON_CN52XX (OCTEON_CN52XX_PASS2_0 | OM_IGNORE_REVISION)
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#define OCTEON_CN52XX_PASS1_X (OCTEON_CN52XX_PASS1_0 \
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| OM_IGNORE_MINOR_REVISION)
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#define OCTEON_CN52XX_PASS2_X (OCTEON_CN52XX_PASS2_0 \
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| OM_IGNORE_MINOR_REVISION)
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#define OCTEON_CN52XX_PASS1_X (OCTEON_CN52XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)
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#define OCTEON_CN52XX_PASS2_X (OCTEON_CN52XX_PASS2_0 | OM_IGNORE_MINOR_REVISION)
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#define OCTEON_CN52XX_PASS1 OCTEON_CN52XX_PASS1_X
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#define OCTEON_CN52XX_PASS2 OCTEON_CN52XX_PASS2_X
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@ -174,28 +188,23 @@
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#define OCTEON_CN3005_PASS1 (0x000d0210 | OM_CHECK_SUBMODEL)
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#define OCTEON_CN3005_PASS1_0 (0x000d0210 | OM_CHECK_SUBMODEL)
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#define OCTEON_CN3005_PASS1_1 (0x000d0212 | OM_CHECK_SUBMODEL)
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#define OCTEON_CN3005 (OCTEON_CN3005_PASS1 | OM_IGNORE_REVISION \
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| OM_CHECK_SUBMODEL)
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#define OCTEON_CN3005 (OCTEON_CN3005_PASS1 | OM_IGNORE_REVISION | OM_CHECK_SUBMODEL)
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#define OCTEON_CN3010_PASS1 (0x000d0200 | OM_CHECK_SUBMODEL)
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#define OCTEON_CN3010_PASS1_0 (0x000d0200 | OM_CHECK_SUBMODEL)
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#define OCTEON_CN3010_PASS1_1 (0x000d0202 | OM_CHECK_SUBMODEL)
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#define OCTEON_CN3010 (OCTEON_CN3010_PASS1 | OM_IGNORE_REVISION \
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| OM_CHECK_SUBMODEL)
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#define OCTEON_CN3010 (OCTEON_CN3010_PASS1 | OM_IGNORE_REVISION | OM_CHECK_SUBMODEL)
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#define OCTEON_CN3020_PASS1 (0x000d0110 | OM_CHECK_SUBMODEL)
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#define OCTEON_CN3020_PASS1_0 (0x000d0110 | OM_CHECK_SUBMODEL)
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#define OCTEON_CN3020_PASS1_1 (0x000d0112 | OM_CHECK_SUBMODEL)
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#define OCTEON_CN3020 (OCTEON_CN3020_PASS1 | OM_IGNORE_REVISION \
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| OM_CHECK_SUBMODEL)
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/* This matches the complete family of CN3xxx CPUs, and not subsequent models */
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#define OCTEON_CN3XXX (OCTEON_CN58XX_PASS1_0 \
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| OM_MATCH_PREVIOUS_MODELS \
|
||||
| OM_IGNORE_REVISION)
|
||||
#define OCTEON_CN3020 (OCTEON_CN3020_PASS1 | OM_IGNORE_REVISION | OM_CHECK_SUBMODEL)
|
||||
|
||||
/*
|
||||
* This matches the complete family of CN3xxx CPUs, and not subsequent
|
||||
* models
|
||||
*/
|
||||
#define OCTEON_CN3XXX (OCTEON_CN58XX_PASS1_0 | OM_MATCH_PREVIOUS_MODELS | OM_IGNORE_REVISION)
|
||||
#define OCTEON_CN5XXX (OCTEON_CN58XX_PASS1_0 | OM_MATCH_5XXX_FAMILY_MODELS)
|
||||
#define OCTEON_CN6XXX (OCTEON_CN63XX_PASS1_0 | OM_MATCH_6XXX_FAMILY_MODELS)
|
||||
|
||||
@ -221,90 +230,55 @@
|
||||
#define OCTEON_38XX_FAMILY_MASK 0x00ffff00
|
||||
#define OCTEON_38XX_FAMILY_REV_MASK 0x00ffff0f
|
||||
#define OCTEON_38XX_MODEL_MASK 0x00ffff10
|
||||
#define OCTEON_38XX_MODEL_REV_MASK (OCTEON_38XX_FAMILY_REV_MASK \
|
||||
| OCTEON_38XX_MODEL_MASK)
|
||||
#define OCTEON_38XX_MODEL_REV_MASK (OCTEON_38XX_FAMILY_REV_MASK | OCTEON_38XX_MODEL_MASK)
|
||||
|
||||
/* CN5XXX and later use different layout of bits in the revision ID field */
|
||||
#define OCTEON_58XX_FAMILY_MASK OCTEON_38XX_FAMILY_MASK
|
||||
#define OCTEON_58XX_FAMILY_REV_MASK 0x00ffff3f
|
||||
#define OCTEON_58XX_MODEL_MASK 0x00ffffc0
|
||||
#define OCTEON_58XX_MODEL_REV_MASK (OCTEON_58XX_FAMILY_REV_MASK \
|
||||
| OCTEON_58XX_MODEL_MASK)
|
||||
#define OCTEON_58XX_MODEL_MINOR_REV_MASK (OCTEON_58XX_MODEL_REV_MASK \
|
||||
& 0x00fffff8)
|
||||
#define OCTEON_58XX_MODEL_REV_MASK (OCTEON_58XX_FAMILY_REV_MASK | OCTEON_58XX_MODEL_MASK)
|
||||
#define OCTEON_58XX_MODEL_MINOR_REV_MASK (OCTEON_58XX_MODEL_REV_MASK & 0x00fffff8)
|
||||
#define OCTEON_5XXX_MODEL_MASK 0x00ff0fc0
|
||||
|
||||
#define __OCTEON_MATCH_MASK__(x, y, z) (((x) & (z)) == ((y) & (z)))
|
||||
|
||||
/* NOTE: This is for internal (to this file) use only. */
|
||||
static inline int __OCTEON_IS_MODEL_COMPILE__(uint32_t arg_model,
|
||||
uint32_t chip_model)
|
||||
{
|
||||
uint32_t rev_and_sub = OM_IGNORE_REVISION | OM_CHECK_SUBMODEL;
|
||||
|
||||
if ((arg_model & OCTEON_38XX_FAMILY_MASK) < OCTEON_CN58XX_PASS1_0) {
|
||||
if (((arg_model & OM_FLAG_MASK) == rev_and_sub) &&
|
||||
__OCTEON_MATCH_MASK__(chip_model, arg_model,
|
||||
OCTEON_38XX_MODEL_MASK))
|
||||
return 1;
|
||||
if (((arg_model & OM_FLAG_MASK) == 0) &&
|
||||
__OCTEON_MATCH_MASK__(chip_model, arg_model,
|
||||
OCTEON_38XX_FAMILY_REV_MASK))
|
||||
return 1;
|
||||
if (((arg_model & OM_FLAG_MASK) == OM_IGNORE_REVISION) &&
|
||||
__OCTEON_MATCH_MASK__(chip_model, arg_model,
|
||||
OCTEON_38XX_FAMILY_MASK))
|
||||
return 1;
|
||||
if (((arg_model & OM_FLAG_MASK) == OM_CHECK_SUBMODEL) &&
|
||||
__OCTEON_MATCH_MASK__((chip_model), (arg_model),
|
||||
OCTEON_38XX_MODEL_REV_MASK))
|
||||
return 1;
|
||||
if ((arg_model & OM_MATCH_PREVIOUS_MODELS) &&
|
||||
((chip_model & OCTEON_38XX_MODEL_MASK) <
|
||||
(arg_model & OCTEON_38XX_MODEL_MASK)))
|
||||
return 1;
|
||||
} else {
|
||||
if (((arg_model & OM_FLAG_MASK) == rev_and_sub) &&
|
||||
__OCTEON_MATCH_MASK__((chip_model), (arg_model),
|
||||
OCTEON_58XX_MODEL_MASK))
|
||||
return 1;
|
||||
if (((arg_model & OM_FLAG_MASK) == 0) &&
|
||||
__OCTEON_MATCH_MASK__((chip_model), (arg_model),
|
||||
OCTEON_58XX_FAMILY_REV_MASK))
|
||||
return 1;
|
||||
if (((arg_model & OM_FLAG_MASK) == OM_IGNORE_MINOR_REVISION) &&
|
||||
__OCTEON_MATCH_MASK__((chip_model), (arg_model),
|
||||
OCTEON_58XX_MODEL_MINOR_REV_MASK))
|
||||
return 1;
|
||||
if (((arg_model & OM_FLAG_MASK) == OM_IGNORE_REVISION) &&
|
||||
__OCTEON_MATCH_MASK__((chip_model), (arg_model),
|
||||
OCTEON_58XX_FAMILY_MASK))
|
||||
return 1;
|
||||
if (((arg_model & OM_FLAG_MASK) == OM_CHECK_SUBMODEL) &&
|
||||
__OCTEON_MATCH_MASK__((chip_model), (arg_model),
|
||||
OCTEON_58XX_MODEL_REV_MASK))
|
||||
return 1;
|
||||
|
||||
if (((arg_model & OM_MATCH_5XXX_FAMILY_MODELS) == OM_MATCH_5XXX_FAMILY_MODELS) &&
|
||||
((chip_model) >= OCTEON_CN58XX_PASS1_0) && ((chip_model) < OCTEON_CN63XX_PASS1_0))
|
||||
return 1;
|
||||
|
||||
if (((arg_model & OM_MATCH_6XXX_FAMILY_MODELS) == OM_MATCH_6XXX_FAMILY_MODELS) &&
|
||||
((chip_model) >= OCTEON_CN63XX_PASS1_0))
|
||||
return 1;
|
||||
|
||||
if ((arg_model & OM_MATCH_PREVIOUS_MODELS) &&
|
||||
((chip_model & OCTEON_58XX_MODEL_MASK) <
|
||||
(arg_model & OCTEON_58XX_MODEL_MASK)))
|
||||
return 1;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* forward declarations */
|
||||
static inline uint32_t cvmx_get_proc_id(void) __attribute__ ((pure));
|
||||
static inline uint64_t cvmx_read_csr(uint64_t csr_addr);
|
||||
|
||||
#define __OCTEON_MATCH_MASK__(x, y, z) (((x) & (z)) == ((y) & (z)))
|
||||
|
||||
/* NOTE: This for internal use only! */
|
||||
#define __OCTEON_IS_MODEL_COMPILE__(arg_model, chip_model) \
|
||||
((((arg_model & OCTEON_38XX_FAMILY_MASK) < OCTEON_CN58XX_PASS1_0) && ( \
|
||||
((((arg_model) & (OM_FLAG_MASK)) == (OM_IGNORE_REVISION | OM_CHECK_SUBMODEL)) \
|
||||
&& __OCTEON_MATCH_MASK__((chip_model), (arg_model), OCTEON_38XX_MODEL_MASK)) || \
|
||||
((((arg_model) & (OM_FLAG_MASK)) == 0) \
|
||||
&& __OCTEON_MATCH_MASK__((chip_model), (arg_model), OCTEON_38XX_FAMILY_REV_MASK)) || \
|
||||
((((arg_model) & (OM_FLAG_MASK)) == OM_IGNORE_REVISION) \
|
||||
&& __OCTEON_MATCH_MASK__((chip_model), (arg_model), OCTEON_38XX_FAMILY_MASK)) || \
|
||||
((((arg_model) & (OM_FLAG_MASK)) == OM_CHECK_SUBMODEL) \
|
||||
&& __OCTEON_MATCH_MASK__((chip_model), (arg_model), OCTEON_38XX_MODEL_REV_MASK)) || \
|
||||
((((arg_model) & (OM_MATCH_PREVIOUS_MODELS)) == OM_MATCH_PREVIOUS_MODELS) \
|
||||
&& (((chip_model) & OCTEON_38XX_MODEL_MASK) < ((arg_model) & OCTEON_38XX_MODEL_MASK))) \
|
||||
)) || \
|
||||
(((arg_model & OCTEON_38XX_FAMILY_MASK) >= OCTEON_CN58XX_PASS1_0) && ( \
|
||||
((((arg_model) & (OM_FLAG_MASK)) == (OM_IGNORE_REVISION | OM_CHECK_SUBMODEL)) \
|
||||
&& __OCTEON_MATCH_MASK__((chip_model), (arg_model), OCTEON_58XX_MODEL_MASK)) || \
|
||||
((((arg_model) & (OM_FLAG_MASK)) == 0) \
|
||||
&& __OCTEON_MATCH_MASK__((chip_model), (arg_model), OCTEON_58XX_FAMILY_REV_MASK)) || \
|
||||
((((arg_model) & (OM_FLAG_MASK)) == OM_IGNORE_MINOR_REVISION) \
|
||||
&& __OCTEON_MATCH_MASK__((chip_model), (arg_model), OCTEON_58XX_MODEL_MINOR_REV_MASK)) || \
|
||||
((((arg_model) & (OM_FLAG_MASK)) == OM_IGNORE_REVISION) \
|
||||
&& __OCTEON_MATCH_MASK__((chip_model), (arg_model), OCTEON_58XX_FAMILY_MASK)) || \
|
||||
((((arg_model) & (OM_FLAG_MASK)) == OM_CHECK_SUBMODEL) \
|
||||
&& __OCTEON_MATCH_MASK__((chip_model), (arg_model), OCTEON_58XX_MODEL_REV_MASK)) || \
|
||||
((((arg_model) & (OM_MATCH_5XXX_FAMILY_MODELS)) == OM_MATCH_5XXX_FAMILY_MODELS) \
|
||||
&& ((chip_model) >= OCTEON_CN58XX_PASS1_0) && ((chip_model) < OCTEON_CN63XX_PASS1_0)) || \
|
||||
((((arg_model) & (OM_MATCH_6XXX_FAMILY_MODELS)) == OM_MATCH_6XXX_FAMILY_MODELS) \
|
||||
&& ((chip_model) >= OCTEON_CN63XX_PASS1_0)) || \
|
||||
((((arg_model) & (OM_MATCH_PREVIOUS_MODELS)) == OM_MATCH_PREVIOUS_MODELS) \
|
||||
&& (((chip_model) & OCTEON_58XX_MODEL_MASK) < ((arg_model) & OCTEON_58XX_MODEL_MASK))) \
|
||||
)))
|
||||
|
||||
/* NOTE: This for internal use only!!!!! */
|
||||
static inline int __octeon_is_model_runtime__(uint32_t model)
|
||||
{
|
||||
@ -312,22 +286,25 @@ static inline int __octeon_is_model_runtime__(uint32_t model)
|
||||
|
||||
/*
|
||||
* Check for special case of mismarked 3005 samples. We only
|
||||
* need to check if the sub model isn't being ignored.
|
||||
* need to check if the sub model isn't being ignored
|
||||
*/
|
||||
if ((model & OM_CHECK_SUBMODEL) == OM_CHECK_SUBMODEL) {
|
||||
if (cpuid == OCTEON_CN3010_PASS1 \
|
||||
&& (cvmx_read_csr(0x80011800800007B8ull) & (1ull << 34)))
|
||||
if (cpuid == OCTEON_CN3010_PASS1 && (cvmx_read_csr(0x80011800800007B8ull) & (1ull << 34)))
|
||||
cpuid |= 0x10;
|
||||
}
|
||||
return __OCTEON_IS_MODEL_COMPILE__(model, cpuid);
|
||||
}
|
||||
|
||||
/*
|
||||
* The OCTEON_IS_MODEL macro should be used for all Octeon model
|
||||
* checking done in a program. This should be kept runtime if at all
|
||||
* possible. Any compile time (#if OCTEON_IS_MODEL) usage must be
|
||||
* condtionalized with OCTEON_IS_COMMON_BINARY() if runtime checking
|
||||
* support is required.
|
||||
* The OCTEON_IS_MODEL macro should be used for all Octeon model checking done
|
||||
* in a program.
|
||||
* This should be kept runtime if at all possible and must be conditionalized
|
||||
* with OCTEON_IS_COMMON_BINARY() if runtime checking support is required.
|
||||
*
|
||||
* Use of the macro in preprocessor directives ( #if OCTEON_IS_MODEL(...) )
|
||||
* is NOT SUPPORTED, and should be replaced with CVMX_COMPILED_FOR()
|
||||
* I.e.:
|
||||
* #if OCTEON_IS_MODEL(OCTEON_CN56XX) -> #if CVMX_COMPILED_FOR(OCTEON_CN56XX)
|
||||
*/
|
||||
#define OCTEON_IS_MODEL(x) __octeon_is_model_runtime__(x)
|
||||
#define OCTEON_IS_COMMON_BINARY() 1
|
||||
|
||||
Loading…
Reference in New Issue
Block a user