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ahci/pata_jmicron: fix JMicron quirk

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For all JMicrons except for 361 and 368, AHCI mode enable bits in the
Control(1) should be set.  This used to be done in both ahci and
pata_jmicron but while moving programming to PCI quirk, it was removed
from ahci part while still left in pata_jmicron.

The implemented JMicron PCI quirk was incorrect in that it didn't
program AHCI mode enable bits.  If pata_jmicron is loaded first and
programs those bits, the ahci ports work; otherwise, ahci device
detection fails miserably.

This patch makes JMicron PCI quirk clear SATA IDE mode bits and set
AHCI mode bits and remove the respective part from pata_jmicron.
Tested on JMB361, 363 and 368.

Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
This commit is contained in:
Tejun Heo 2007-02-02 14:51:09 +09:00 committed by Jeff Garzik
parent e34efe3b10
commit 7728098967
2 changed files with 7 additions and 15 deletions
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18
drivers/ata/pata_jmicron.c
View File

@ -204,20 +204,12 @@ static int jmicron_init_one (struct pci_dev *pdev, const struct pci_device_id *i
u32 reg;
if (id->driver_data != 368) {
/* Put the controller into AHCI mode in case the AHCI driver
has not yet been loaded. This can be done with either
function present */
/* PATA controller is fn 1, AHCI is fn 0 */
if (id->driver_data != 368 && PCI_FUNC(pdev->devfn) != 1)
return -ENODEV;
/* FIXME: We may want a way to override this in future */
pci_write_config_byte(pdev, 0x41, 0xa1);
/* PATA controller is fn 1, AHCI is fn 0 */
if (PCI_FUNC(pdev->devfn) != 1)
return -ENODEV;
}
if ( id->driver_data == 365 || id->driver_data == 366) {
/* The 365/66 have two PATA channels, redirect the second */
/* The 365/66 have two PATA channels, redirect the second */
if (id->driver_data == 365 || id->driver_data == 366) {
pci_read_config_dword(pdev, 0x80, &reg);
reg |= (1 << 24); /* IDE1 to PATA IDE secondary */
pci_write_config_dword(pdev, 0x80, reg);

4
drivers/pci/quirks.c
View File

@ -1262,8 +1262,8 @@ static void quirk_jmicron_dualfn(struct pci_dev *pdev)
pci_read_config_dword(pdev, 0x40, &conf);
/* Enable dual function mode, AHCI on fn 0, IDE fn1 */
/* Set the class codes correctly and then direct IDE 0 */
conf &= ~0x000F0200; /* Clear bit 9 and 16-19 */
conf |= 0x00C20002; /* Set bit 1, 17, 22, 23 */
conf &= ~0x000FF200; /* Clear bit 9 and 12-19 */
conf |= 0x00C2A102; /* Set 1, 8, 13, 15, 17, 22, 23 */
pci_write_config_dword(pdev, 0x40, conf);
/* Reconfigure so that the PCI scanner discovers the