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Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/net-next
Jeff Kirsher says: ==================== Intel Wired LAN Driver Updates 2014-06-06 This series contains updates to i40e and i40evf. Shannon sets the lan_veb index when the Virtual Ethernet Bridge (VEB) is created for the basic LAN device and its Virtual Switch Interfaces (VSIs). Also adds the VEB/VSI statistics in the ethtool stats output. Increases the reset wait time because the original time was too optimistic and resets were failing after EMPR. This won't delay the actual wait, just allows us to poll more times as needed. He fixes the attempted removal of the HMC space and unhook IRQs when a reset recovery fails because the HMC space never got setup and IRQs are already unhooked in the first place, so the removal is not necessary. Jesse adds a log message for pre-production hardware so that the user is notified that there may be issues with the hardware, yet does not prevent the user from using the hardware. Add the printing of link messages in the i40e driver like all the other Intel Ethernet drivers. Mitch makes log message changes to i40evf to prevent confusion by making the most common messages less scary by lowering them to a less terrifying log level. This is due to the fact that depending on the timing of what the PF driver is doing, it may take a few tries before the VF driver is able to communicate with the PF driver on init or reset recovery. Kamil provides a change to prevent the driver from getting into a endless loop while trying to send GetVersion AQ command, since BO silicon blocks AQ registers when in Blank Flash mode. So introduce a simple check for a correct value in one of the AQ registers to be sure that AQ was configured correctly. Matt adds a function which indicates our intention to enable or disable a particular transmit queue. Also adds a function to notify the device's transmit unit that we are about to enable or disable a transmit queue. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
David S. Miller
commit
77b94799da
@ -414,6 +414,7 @@ struct i40e_vsi {
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struct i40e_q_vector **q_vectors;
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int num_q_vectors;
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int base_vector;
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bool irqs_ready;
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u16 seid; /* HW index of this VSI (absolute index) */
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u16 id; /* VSI number */
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@ -291,8 +291,11 @@ static void i40e_free_asq_bufs(struct i40e_hw *hw)
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*
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* Configure base address and length registers for the transmit queue
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**/
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static void i40e_config_asq_regs(struct i40e_hw *hw)
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static i40e_status i40e_config_asq_regs(struct i40e_hw *hw)
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{
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i40e_status ret_code = 0;
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u32 reg = 0;
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if (hw->mac.type == I40E_MAC_VF) {
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/* configure the transmit queue */
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wr32(hw, I40E_VF_ATQBAH1,
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@ -301,6 +304,7 @@ static void i40e_config_asq_regs(struct i40e_hw *hw)
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lower_32_bits(hw->aq.asq.desc_buf.pa));
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wr32(hw, I40E_VF_ATQLEN1, (hw->aq.num_asq_entries |
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I40E_VF_ATQLEN1_ATQENABLE_MASK));
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reg = rd32(hw, I40E_VF_ATQBAL1);
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} else {
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/* configure the transmit queue */
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wr32(hw, I40E_PF_ATQBAH,
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@ -309,7 +313,14 @@ static void i40e_config_asq_regs(struct i40e_hw *hw)
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lower_32_bits(hw->aq.asq.desc_buf.pa));
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wr32(hw, I40E_PF_ATQLEN, (hw->aq.num_asq_entries |
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I40E_PF_ATQLEN_ATQENABLE_MASK));
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reg = rd32(hw, I40E_PF_ATQBAL);
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}
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/* Check one register to verify that config was applied */
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if (reg != lower_32_bits(hw->aq.asq.desc_buf.pa))
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ret_code = I40E_ERR_ADMIN_QUEUE_ERROR;
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return ret_code;
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}
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/**
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@ -318,8 +329,11 @@ static void i40e_config_asq_regs(struct i40e_hw *hw)
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*
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* Configure base address and length registers for the receive (event queue)
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**/
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static void i40e_config_arq_regs(struct i40e_hw *hw)
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static i40e_status i40e_config_arq_regs(struct i40e_hw *hw)
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{
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i40e_status ret_code = 0;
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u32 reg = 0;
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if (hw->mac.type == I40E_MAC_VF) {
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/* configure the receive queue */
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wr32(hw, I40E_VF_ARQBAH1,
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@ -328,6 +342,7 @@ static void i40e_config_arq_regs(struct i40e_hw *hw)
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lower_32_bits(hw->aq.arq.desc_buf.pa));
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wr32(hw, I40E_VF_ARQLEN1, (hw->aq.num_arq_entries |
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I40E_VF_ARQLEN1_ARQENABLE_MASK));
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reg = rd32(hw, I40E_VF_ARQBAL1);
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} else {
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/* configure the receive queue */
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wr32(hw, I40E_PF_ARQBAH,
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@ -336,10 +351,17 @@ static void i40e_config_arq_regs(struct i40e_hw *hw)
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lower_32_bits(hw->aq.arq.desc_buf.pa));
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wr32(hw, I40E_PF_ARQLEN, (hw->aq.num_arq_entries |
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I40E_PF_ARQLEN_ARQENABLE_MASK));
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reg = rd32(hw, I40E_PF_ARQBAL);
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}
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/* Update tail in the HW to post pre-allocated buffers */
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wr32(hw, hw->aq.arq.tail, hw->aq.num_arq_entries - 1);
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/* Check one register to verify that config was applied */
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if (reg != lower_32_bits(hw->aq.arq.desc_buf.pa))
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ret_code = I40E_ERR_ADMIN_QUEUE_ERROR;
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return ret_code;
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}
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/**
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@ -387,7 +409,9 @@ static i40e_status i40e_init_asq(struct i40e_hw *hw)
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goto init_adminq_free_rings;
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/* initialize base registers */
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i40e_config_asq_regs(hw);
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ret_code = i40e_config_asq_regs(hw);
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if (ret_code)
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goto init_adminq_free_rings;
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/* success! */
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goto init_adminq_exit;
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@ -444,7 +468,9 @@ static i40e_status i40e_init_arq(struct i40e_hw *hw)
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goto init_adminq_free_rings;
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/* initialize base registers */
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i40e_config_arq_regs(hw);
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ret_code = i40e_config_arq_regs(hw);
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if (ret_code)
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goto init_adminq_free_rings;
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/* success! */
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goto init_adminq_exit;
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@ -656,6 +656,37 @@ i40e_status i40e_get_mac_addr(struct i40e_hw *hw, u8 *mac_addr)
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return status;
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}
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/**
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* i40e_pre_tx_queue_cfg - pre tx queue configure
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* @hw: pointer to the HW structure
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* @queue: target pf queue index
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* @enable: state change request
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*
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* Handles hw requirement to indicate intention to enable
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* or disable target queue.
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**/
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void i40e_pre_tx_queue_cfg(struct i40e_hw *hw, u32 queue, bool enable)
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{
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u32 reg_val = rd32(hw, I40E_PFLAN_QALLOC);
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u32 first_queue = (reg_val & I40E_PFLAN_QALLOC_FIRSTQ_MASK);
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u32 abs_queue_idx = first_queue + queue;
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u32 reg_block = 0;
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if (abs_queue_idx >= 128)
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reg_block = abs_queue_idx / 128;
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reg_val = rd32(hw, I40E_GLLAN_TXPRE_QDIS(reg_block));
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reg_val &= ~I40E_GLLAN_TXPRE_QDIS_QINDX_MASK;
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reg_val |= (abs_queue_idx << I40E_GLLAN_TXPRE_QDIS_QINDX_SHIFT);
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if (enable)
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reg_val |= I40E_GLLAN_TXPRE_QDIS_CLEAR_QDIS_MASK;
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else
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reg_val |= I40E_GLLAN_TXPRE_QDIS_SET_QDIS_MASK;
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wr32(hw, I40E_GLLAN_TXPRE_QDIS(reg_block), reg_val);
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}
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/**
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* i40e_get_media_type - Gets media type
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* @hw: pointer to the hardware structure
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@ -703,7 +734,7 @@ static enum i40e_media_type i40e_get_media_type(struct i40e_hw *hw)
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}
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#define I40E_PF_RESET_WAIT_COUNT_A0 200
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#define I40E_PF_RESET_WAIT_COUNT 10
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#define I40E_PF_RESET_WAIT_COUNT 100
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/**
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* i40e_pf_reset - Reset the PF
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* @hw: pointer to the hardware structure
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@ -46,6 +46,8 @@ struct i40e_stats {
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I40E_STAT(struct i40e_pf, _name, _stat)
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#define I40E_VSI_STAT(_name, _stat) \
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I40E_STAT(struct i40e_vsi, _name, _stat)
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#define I40E_VEB_STAT(_name, _stat) \
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I40E_STAT(struct i40e_veb, _name, _stat)
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static const struct i40e_stats i40e_gstrings_net_stats[] = {
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I40E_NETDEV_STAT(rx_packets),
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@ -56,16 +58,34 @@ static const struct i40e_stats i40e_gstrings_net_stats[] = {
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I40E_NETDEV_STAT(tx_errors),
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I40E_NETDEV_STAT(rx_dropped),
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I40E_NETDEV_STAT(tx_dropped),
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I40E_NETDEV_STAT(multicast),
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I40E_NETDEV_STAT(collisions),
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I40E_NETDEV_STAT(rx_length_errors),
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I40E_NETDEV_STAT(rx_crc_errors),
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};
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static const struct i40e_stats i40e_gstrings_veb_stats[] = {
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I40E_VEB_STAT("rx_bytes", stats.rx_bytes),
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I40E_VEB_STAT("tx_bytes", stats.tx_bytes),
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I40E_VEB_STAT("rx_unicast", stats.rx_unicast),
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I40E_VEB_STAT("tx_unicast", stats.tx_unicast),
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I40E_VEB_STAT("rx_multicast", stats.rx_multicast),
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I40E_VEB_STAT("tx_multicast", stats.tx_multicast),
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I40E_VEB_STAT("rx_broadcast", stats.rx_broadcast),
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I40E_VEB_STAT("tx_broadcast", stats.tx_broadcast),
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I40E_VEB_STAT("rx_discards", stats.rx_discards),
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I40E_VEB_STAT("tx_discards", stats.tx_discards),
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I40E_VEB_STAT("tx_errors", stats.tx_errors),
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I40E_VEB_STAT("rx_unknown_protocol", stats.rx_unknown_protocol),
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};
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static const struct i40e_stats i40e_gstrings_misc_stats[] = {
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I40E_VSI_STAT("rx_unknown_protocol", eth_stats.rx_unknown_protocol),
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I40E_VSI_STAT("rx_unicast", eth_stats.rx_unicast),
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I40E_VSI_STAT("tx_unicast", eth_stats.tx_unicast),
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I40E_VSI_STAT("rx_multicast", eth_stats.rx_multicast),
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I40E_VSI_STAT("tx_multicast", eth_stats.tx_multicast),
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I40E_VSI_STAT("rx_broadcast", eth_stats.rx_broadcast),
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I40E_VSI_STAT("tx_broadcast", eth_stats.tx_broadcast),
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I40E_VSI_STAT("rx_unknown_protocol", eth_stats.rx_unknown_protocol),
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};
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static int i40e_add_fdir_ethtool(struct i40e_vsi *vsi,
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@ -84,6 +104,12 @@ static int i40e_add_fdir_ethtool(struct i40e_vsi *vsi,
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static struct i40e_stats i40e_gstrings_stats[] = {
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I40E_PF_STAT("rx_bytes", stats.eth.rx_bytes),
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I40E_PF_STAT("tx_bytes", stats.eth.tx_bytes),
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I40E_PF_STAT("rx_unicast", stats.eth.rx_unicast),
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I40E_PF_STAT("tx_unicast", stats.eth.tx_unicast),
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I40E_PF_STAT("rx_multicast", stats.eth.rx_multicast),
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I40E_PF_STAT("tx_multicast", stats.eth.tx_multicast),
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I40E_PF_STAT("rx_broadcast", stats.eth.rx_broadcast),
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I40E_PF_STAT("tx_broadcast", stats.eth.tx_broadcast),
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I40E_PF_STAT("tx_errors", stats.eth.tx_errors),
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I40E_PF_STAT("rx_dropped", stats.eth.rx_discards),
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I40E_PF_STAT("tx_dropped", stats.eth.tx_discards),
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@ -142,6 +168,7 @@ static struct i40e_stats i40e_gstrings_stats[] = {
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FIELD_SIZEOF(struct i40e_pf, stats.priority_xon_tx) + \
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FIELD_SIZEOF(struct i40e_pf, stats.priority_xon_2_xoff)) \
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/ sizeof(u64))
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#define I40E_VEB_STATS_LEN ARRAY_SIZE(i40e_gstrings_veb_stats)
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#define I40E_PF_STATS_LEN(n) (I40E_GLOBAL_STATS_LEN + \
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I40E_PFC_STATS_LEN + \
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I40E_VSI_STATS_LEN((n)))
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@ -627,10 +654,15 @@ static int i40e_get_sset_count(struct net_device *netdev, int sset)
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case ETH_SS_TEST:
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return I40E_TEST_LEN;
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case ETH_SS_STATS:
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if (vsi == pf->vsi[pf->lan_vsi])
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return I40E_PF_STATS_LEN(netdev);
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else
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if (vsi == pf->vsi[pf->lan_vsi]) {
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int len = I40E_PF_STATS_LEN(netdev);
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if (pf->lan_veb != I40E_NO_VEB)
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len += I40E_VEB_STATS_LEN;
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return len;
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} else {
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return I40E_VSI_STATS_LEN(netdev);
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}
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default:
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return -EOPNOTSUPP;
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}
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@ -686,23 +718,33 @@ static void i40e_get_ethtool_stats(struct net_device *netdev,
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i += 2;
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}
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rcu_read_unlock();
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if (vsi == pf->vsi[pf->lan_vsi]) {
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for (j = 0; j < I40E_GLOBAL_STATS_LEN; j++) {
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p = (char *)pf + i40e_gstrings_stats[j].stat_offset;
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data[i++] = (i40e_gstrings_stats[j].sizeof_stat ==
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sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
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if (vsi != pf->vsi[pf->lan_vsi])
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return;
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if (pf->lan_veb != I40E_NO_VEB) {
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struct i40e_veb *veb = pf->veb[pf->lan_veb];
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for (j = 0; j < I40E_VEB_STATS_LEN; j++) {
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p = (char *)veb;
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p += i40e_gstrings_veb_stats[j].stat_offset;
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data[i++] = (i40e_gstrings_veb_stats[j].sizeof_stat ==
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sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
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}
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for (j = 0; j < I40E_MAX_USER_PRIORITY; j++) {
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data[i++] = pf->stats.priority_xon_tx[j];
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data[i++] = pf->stats.priority_xoff_tx[j];
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}
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for (j = 0; j < I40E_MAX_USER_PRIORITY; j++) {
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data[i++] = pf->stats.priority_xon_rx[j];
|
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data[i++] = pf->stats.priority_xoff_rx[j];
|
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}
|
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for (j = 0; j < I40E_MAX_USER_PRIORITY; j++)
|
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data[i++] = pf->stats.priority_xon_2_xoff[j];
|
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}
|
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for (j = 0; j < I40E_GLOBAL_STATS_LEN; j++) {
|
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p = (char *)pf + i40e_gstrings_stats[j].stat_offset;
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data[i++] = (i40e_gstrings_stats[j].sizeof_stat ==
|
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sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
|
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}
|
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for (j = 0; j < I40E_MAX_USER_PRIORITY; j++) {
|
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data[i++] = pf->stats.priority_xon_tx[j];
|
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data[i++] = pf->stats.priority_xoff_tx[j];
|
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}
|
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for (j = 0; j < I40E_MAX_USER_PRIORITY; j++) {
|
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data[i++] = pf->stats.priority_xon_rx[j];
|
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data[i++] = pf->stats.priority_xoff_rx[j];
|
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}
|
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for (j = 0; j < I40E_MAX_USER_PRIORITY; j++)
|
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data[i++] = pf->stats.priority_xon_2_xoff[j];
|
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}
|
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|
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static void i40e_get_strings(struct net_device *netdev, u32 stringset,
|
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@ -742,34 +784,42 @@ static void i40e_get_strings(struct net_device *netdev, u32 stringset,
|
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snprintf(p, ETH_GSTRING_LEN, "rx-%u.rx_bytes", i);
|
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p += ETH_GSTRING_LEN;
|
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}
|
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if (vsi == pf->vsi[pf->lan_vsi]) {
|
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for (i = 0; i < I40E_GLOBAL_STATS_LEN; i++) {
|
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snprintf(p, ETH_GSTRING_LEN, "port.%s",
|
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i40e_gstrings_stats[i].stat_string);
|
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p += ETH_GSTRING_LEN;
|
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}
|
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for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
|
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snprintf(p, ETH_GSTRING_LEN,
|
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"port.tx_priority_%u_xon", i);
|
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p += ETH_GSTRING_LEN;
|
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snprintf(p, ETH_GSTRING_LEN,
|
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"port.tx_priority_%u_xoff", i);
|
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p += ETH_GSTRING_LEN;
|
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}
|
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for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
|
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snprintf(p, ETH_GSTRING_LEN,
|
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"port.rx_priority_%u_xon", i);
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p += ETH_GSTRING_LEN;
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snprintf(p, ETH_GSTRING_LEN,
|
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"port.rx_priority_%u_xoff", i);
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p += ETH_GSTRING_LEN;
|
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}
|
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for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
|
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snprintf(p, ETH_GSTRING_LEN,
|
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"port.rx_priority_%u_xon_2_xoff", i);
|
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if (vsi != pf->vsi[pf->lan_vsi])
|
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return;
|
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|
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if (pf->lan_veb != I40E_NO_VEB) {
|
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for (i = 0; i < I40E_VEB_STATS_LEN; i++) {
|
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snprintf(p, ETH_GSTRING_LEN, "veb.%s",
|
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i40e_gstrings_veb_stats[i].stat_string);
|
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p += ETH_GSTRING_LEN;
|
||||
}
|
||||
}
|
||||
for (i = 0; i < I40E_GLOBAL_STATS_LEN; i++) {
|
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snprintf(p, ETH_GSTRING_LEN, "port.%s",
|
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i40e_gstrings_stats[i].stat_string);
|
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p += ETH_GSTRING_LEN;
|
||||
}
|
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for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
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snprintf(p, ETH_GSTRING_LEN,
|
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"port.tx_priority_%u_xon", i);
|
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p += ETH_GSTRING_LEN;
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snprintf(p, ETH_GSTRING_LEN,
|
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"port.tx_priority_%u_xoff", i);
|
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p += ETH_GSTRING_LEN;
|
||||
}
|
||||
for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
|
||||
snprintf(p, ETH_GSTRING_LEN,
|
||||
"port.rx_priority_%u_xon", i);
|
||||
p += ETH_GSTRING_LEN;
|
||||
snprintf(p, ETH_GSTRING_LEN,
|
||||
"port.rx_priority_%u_xoff", i);
|
||||
p += ETH_GSTRING_LEN;
|
||||
}
|
||||
for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
|
||||
snprintf(p, ETH_GSTRING_LEN,
|
||||
"port.rx_priority_%u_xon_2_xoff", i);
|
||||
p += ETH_GSTRING_LEN;
|
||||
}
|
||||
/* BUG_ON(p - data != I40E_STATS_LEN * ETH_GSTRING_LEN); */
|
||||
break;
|
||||
}
|
||||
|
||||
@ -38,8 +38,8 @@ static const char i40e_driver_string[] =
|
||||
#define DRV_KERN "-k"
|
||||
|
||||
#define DRV_VERSION_MAJOR 0
|
||||
#define DRV_VERSION_MINOR 3
|
||||
#define DRV_VERSION_BUILD 46
|
||||
#define DRV_VERSION_MINOR 4
|
||||
#define DRV_VERSION_BUILD 3
|
||||
#define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
|
||||
__stringify(DRV_VERSION_MINOR) "." \
|
||||
__stringify(DRV_VERSION_BUILD) DRV_KERN
|
||||
@ -854,11 +854,37 @@ static void i40e_update_pf_stats(struct i40e_pf *pf)
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->eth.tx_discards,
|
||||
&nsd->eth.tx_discards);
|
||||
|
||||
i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
|
||||
I40E_GLPRT_UPRCL(hw->port),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->eth.rx_unicast,
|
||||
&nsd->eth.rx_unicast);
|
||||
i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
|
||||
I40E_GLPRT_MPRCL(hw->port),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->eth.rx_multicast,
|
||||
&nsd->eth.rx_multicast);
|
||||
i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
|
||||
I40E_GLPRT_BPRCL(hw->port),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->eth.rx_broadcast,
|
||||
&nsd->eth.rx_broadcast);
|
||||
i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
|
||||
I40E_GLPRT_UPTCL(hw->port),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->eth.tx_unicast,
|
||||
&nsd->eth.tx_unicast);
|
||||
i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
|
||||
I40E_GLPRT_MPTCL(hw->port),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->eth.tx_multicast,
|
||||
&nsd->eth.tx_multicast);
|
||||
i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
|
||||
I40E_GLPRT_BPTCL(hw->port),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->eth.tx_broadcast,
|
||||
&nsd->eth.tx_broadcast);
|
||||
|
||||
i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
|
||||
pf->stat_offsets_loaded,
|
||||
@ -2764,6 +2790,7 @@ static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
|
||||
&q_vector->affinity_mask);
|
||||
}
|
||||
|
||||
vsi->irqs_ready = true;
|
||||
return 0;
|
||||
|
||||
free_queue_irqs:
|
||||
@ -3183,6 +3210,12 @@ static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
|
||||
|
||||
pf_q = vsi->base_queue;
|
||||
for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
|
||||
|
||||
/* warn the TX unit of coming changes */
|
||||
i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
|
||||
if (!enable)
|
||||
udelay(10);
|
||||
|
||||
for (j = 0; j < 50; j++) {
|
||||
tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
|
||||
if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
|
||||
@ -3317,6 +3350,10 @@ static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
|
||||
if (!vsi->q_vectors)
|
||||
return;
|
||||
|
||||
if (!vsi->irqs_ready)
|
||||
return;
|
||||
|
||||
vsi->irqs_ready = false;
|
||||
for (i = 0; i < vsi->num_q_vectors; i++) {
|
||||
u16 vector = i + base;
|
||||
|
||||
@ -4103,6 +4140,54 @@ out:
|
||||
return err;
|
||||
}
|
||||
#endif /* CONFIG_I40E_DCB */
|
||||
#define SPEED_SIZE 14
|
||||
#define FC_SIZE 8
|
||||
/**
|
||||
* i40e_print_link_message - print link up or down
|
||||
* @vsi: the VSI for which link needs a message
|
||||
*/
|
||||
static void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
|
||||
{
|
||||
char speed[SPEED_SIZE] = "Unknown";
|
||||
char fc[FC_SIZE] = "RX/TX";
|
||||
|
||||
if (!isup) {
|
||||
netdev_info(vsi->netdev, "NIC Link is Down\n");
|
||||
return;
|
||||
}
|
||||
|
||||
switch (vsi->back->hw.phy.link_info.link_speed) {
|
||||
case I40E_LINK_SPEED_40GB:
|
||||
strncpy(speed, "40 Gbps", SPEED_SIZE);
|
||||
break;
|
||||
case I40E_LINK_SPEED_10GB:
|
||||
strncpy(speed, "10 Gbps", SPEED_SIZE);
|
||||
break;
|
||||
case I40E_LINK_SPEED_1GB:
|
||||
strncpy(speed, "1000 Mbps", SPEED_SIZE);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
switch (vsi->back->hw.fc.current_mode) {
|
||||
case I40E_FC_FULL:
|
||||
strncpy(fc, "RX/TX", FC_SIZE);
|
||||
break;
|
||||
case I40E_FC_TX_PAUSE:
|
||||
strncpy(fc, "TX", FC_SIZE);
|
||||
break;
|
||||
case I40E_FC_RX_PAUSE:
|
||||
strncpy(fc, "RX", FC_SIZE);
|
||||
break;
|
||||
default:
|
||||
strncpy(fc, "None", FC_SIZE);
|
||||
break;
|
||||
}
|
||||
|
||||
netdev_info(vsi->netdev, "NIC Link is Up %s Full Duplex, Flow Control: %s\n",
|
||||
speed, fc);
|
||||
}
|
||||
|
||||
/**
|
||||
* i40e_up_complete - Finish the last steps of bringing up a connection
|
||||
@ -4129,11 +4214,11 @@ static int i40e_up_complete(struct i40e_vsi *vsi)
|
||||
|
||||
if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
|
||||
(vsi->netdev)) {
|
||||
netdev_info(vsi->netdev, "NIC Link is Up\n");
|
||||
i40e_print_link_message(vsi, true);
|
||||
netif_tx_start_all_queues(vsi->netdev);
|
||||
netif_carrier_on(vsi->netdev);
|
||||
} else if (vsi->netdev) {
|
||||
netdev_info(vsi->netdev, "NIC Link is Down\n");
|
||||
i40e_print_link_message(vsi, false);
|
||||
}
|
||||
|
||||
/* replay FDIR SB filters */
|
||||
@ -4854,10 +4939,8 @@ static void i40e_link_event(struct i40e_pf *pf)
|
||||
|
||||
if (new_link == old_link)
|
||||
return;
|
||||
|
||||
if (!test_bit(__I40E_DOWN, &pf->vsi[pf->lan_vsi]->state))
|
||||
netdev_info(pf->vsi[pf->lan_vsi]->netdev,
|
||||
"NIC Link is %s\n", (new_link ? "Up" : "Down"));
|
||||
i40e_print_link_message(pf->vsi[pf->lan_vsi], new_link);
|
||||
|
||||
/* Notify the base of the switch tree connected to
|
||||
* the link. Floating VEBs are not notified.
|
||||
@ -5351,7 +5434,7 @@ static void i40e_fdir_teardown(struct i40e_pf *pf)
|
||||
static int i40e_prep_for_reset(struct i40e_pf *pf)
|
||||
{
|
||||
struct i40e_hw *hw = &pf->hw;
|
||||
i40e_status ret;
|
||||
i40e_status ret = 0;
|
||||
u32 v;
|
||||
|
||||
clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
|
||||
@ -5371,10 +5454,13 @@ static int i40e_prep_for_reset(struct i40e_pf *pf)
|
||||
i40e_shutdown_adminq(&pf->hw);
|
||||
|
||||
/* call shutdown HMC */
|
||||
ret = i40e_shutdown_lan_hmc(hw);
|
||||
if (ret) {
|
||||
dev_info(&pf->pdev->dev, "shutdown_lan_hmc failed: %d\n", ret);
|
||||
clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
|
||||
if (hw->hmc.hmc_obj) {
|
||||
ret = i40e_shutdown_lan_hmc(hw);
|
||||
if (ret) {
|
||||
dev_warn(&pf->pdev->dev,
|
||||
"shutdown_lan_hmc failed: %d\n", ret);
|
||||
clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
|
||||
}
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
@ -5872,6 +5958,7 @@ static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
|
||||
vsi->netdev_registered = false;
|
||||
vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
|
||||
INIT_LIST_HEAD(&vsi->mac_filter_list);
|
||||
vsi->irqs_ready = false;
|
||||
|
||||
ret = i40e_set_num_rings_in_vsi(vsi);
|
||||
if (ret)
|
||||
@ -7735,6 +7822,8 @@ struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
|
||||
ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
|
||||
if (ret)
|
||||
goto err_veb;
|
||||
if (vsi_idx == pf->lan_vsi)
|
||||
pf->lan_veb = veb->idx;
|
||||
|
||||
return veb;
|
||||
|
||||
@ -8296,6 +8385,10 @@ static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
|
||||
|
||||
i40e_verify_eeprom(pf);
|
||||
|
||||
/* Rev 0 hardware was never productized */
|
||||
if (hw->revision_id < 1)
|
||||
dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
|
||||
|
||||
i40e_clear_pxe_mode(hw);
|
||||
err = i40e_get_capabilities(pf);
|
||||
if (err)
|
||||
@ -8553,10 +8646,13 @@ static void i40e_remove(struct pci_dev *pdev)
|
||||
}
|
||||
|
||||
/* shutdown and destroy the HMC */
|
||||
ret_code = i40e_shutdown_lan_hmc(&pf->hw);
|
||||
if (ret_code)
|
||||
dev_warn(&pdev->dev,
|
||||
"Failed to destroy the HMC resources: %d\n", ret_code);
|
||||
if (pf->hw.hmc.hmc_obj) {
|
||||
ret_code = i40e_shutdown_lan_hmc(&pf->hw);
|
||||
if (ret_code)
|
||||
dev_warn(&pdev->dev,
|
||||
"Failed to destroy the HMC resources: %d\n",
|
||||
ret_code);
|
||||
}
|
||||
|
||||
/* shutdown the adminq */
|
||||
ret_code = i40e_shutdown_adminq(&pf->hw);
|
||||
|
||||
@ -221,6 +221,7 @@ bool i40e_get_link_status(struct i40e_hw *hw);
|
||||
i40e_status i40e_get_mac_addr(struct i40e_hw *hw,
|
||||
u8 *mac_addr);
|
||||
i40e_status i40e_validate_mac_addr(u8 *mac_addr);
|
||||
void i40e_pre_tx_queue_cfg(struct i40e_hw *hw, u32 queue, bool enable);
|
||||
/* prototype for functions used for NVM access */
|
||||
i40e_status i40e_init_nvm(struct i40e_hw *hw);
|
||||
i40e_status i40e_acquire_nvm(struct i40e_hw *hw,
|
||||
|
||||
@ -1585,6 +1585,14 @@
|
||||
#define I40E_GLLAN_TSOMSK_M 0x000442DC
|
||||
#define I40E_GLLAN_TSOMSK_M_TCPMSKM_SHIFT 0
|
||||
#define I40E_GLLAN_TSOMSK_M_TCPMSKM_MASK (0xFFF << I40E_GLLAN_TSOMSK_M_TCPMSKM_SHIFT)
|
||||
#define I40E_GLLAN_TXPRE_QDIS(_i) (0x000E6500 + ((_i) * 4)) /* i=0..11 */
|
||||
#define I40E_GLLAN_TXPRE_QDIS_QINDX_SHIFT 0
|
||||
#define I40E_GLLAN_TXPRE_QDIS_QINDX_MASK (0x7FF << I40E_GLLAN_TXPRE_QDIS_QINDX_SHIFT)
|
||||
#define I40E_GLLAN_TXPRE_QDIS_SET_QDIS_SHIFT 30
|
||||
#define I40E_GLLAN_TXPRE_QDIS_SET_QDIS_MASK (0x1 << I40E_GLLAN_TXPRE_QDIS_SET_QDIS_SHIFT)
|
||||
#define I40E_GLLAN_TXPRE_QDIS_CLEAR_QDIS_SHIFT 31
|
||||
#define I40E_GLLAN_TXPRE_QDIS_CLEAR_QDIS_MASK (0x1 << I40E_GLLAN_TXPRE_QDIS_CLEAR_QDIS_SHIFT)
|
||||
|
||||
#define I40E_PFLAN_QALLOC 0x001C0400
|
||||
#define I40E_PFLAN_QALLOC_FIRSTQ_SHIFT 0
|
||||
#define I40E_PFLAN_QALLOC_FIRSTQ_MASK (0x7FF << I40E_PFLAN_QALLOC_FIRSTQ_SHIFT)
|
||||
|
||||
@ -289,8 +289,11 @@ static void i40e_free_asq_bufs(struct i40e_hw *hw)
|
||||
*
|
||||
* Configure base address and length registers for the transmit queue
|
||||
**/
|
||||
static void i40e_config_asq_regs(struct i40e_hw *hw)
|
||||
static i40e_status i40e_config_asq_regs(struct i40e_hw *hw)
|
||||
{
|
||||
i40e_status ret_code = 0;
|
||||
u32 reg = 0;
|
||||
|
||||
if (hw->mac.type == I40E_MAC_VF) {
|
||||
/* configure the transmit queue */
|
||||
wr32(hw, I40E_VF_ATQBAH1,
|
||||
@ -299,6 +302,7 @@ static void i40e_config_asq_regs(struct i40e_hw *hw)
|
||||
lower_32_bits(hw->aq.asq.desc_buf.pa));
|
||||
wr32(hw, I40E_VF_ATQLEN1, (hw->aq.num_asq_entries |
|
||||
I40E_VF_ATQLEN1_ATQENABLE_MASK));
|
||||
reg = rd32(hw, I40E_VF_ATQBAL1);
|
||||
} else {
|
||||
/* configure the transmit queue */
|
||||
wr32(hw, I40E_PF_ATQBAH,
|
||||
@ -307,7 +311,14 @@ static void i40e_config_asq_regs(struct i40e_hw *hw)
|
||||
lower_32_bits(hw->aq.asq.desc_buf.pa));
|
||||
wr32(hw, I40E_PF_ATQLEN, (hw->aq.num_asq_entries |
|
||||
I40E_PF_ATQLEN_ATQENABLE_MASK));
|
||||
reg = rd32(hw, I40E_PF_ATQBAL);
|
||||
}
|
||||
|
||||
/* Check one register to verify that config was applied */
|
||||
if (reg != lower_32_bits(hw->aq.asq.desc_buf.pa))
|
||||
ret_code = I40E_ERR_ADMIN_QUEUE_ERROR;
|
||||
|
||||
return ret_code;
|
||||
}
|
||||
|
||||
/**
|
||||
@ -316,8 +327,11 @@ static void i40e_config_asq_regs(struct i40e_hw *hw)
|
||||
*
|
||||
* Configure base address and length registers for the receive (event queue)
|
||||
**/
|
||||
static void i40e_config_arq_regs(struct i40e_hw *hw)
|
||||
static i40e_status i40e_config_arq_regs(struct i40e_hw *hw)
|
||||
{
|
||||
i40e_status ret_code = 0;
|
||||
u32 reg = 0;
|
||||
|
||||
if (hw->mac.type == I40E_MAC_VF) {
|
||||
/* configure the receive queue */
|
||||
wr32(hw, I40E_VF_ARQBAH1,
|
||||
@ -326,6 +340,7 @@ static void i40e_config_arq_regs(struct i40e_hw *hw)
|
||||
lower_32_bits(hw->aq.arq.desc_buf.pa));
|
||||
wr32(hw, I40E_VF_ARQLEN1, (hw->aq.num_arq_entries |
|
||||
I40E_VF_ARQLEN1_ARQENABLE_MASK));
|
||||
reg = rd32(hw, I40E_VF_ARQBAL1);
|
||||
} else {
|
||||
/* configure the receive queue */
|
||||
wr32(hw, I40E_PF_ARQBAH,
|
||||
@ -334,10 +349,17 @@ static void i40e_config_arq_regs(struct i40e_hw *hw)
|
||||
lower_32_bits(hw->aq.arq.desc_buf.pa));
|
||||
wr32(hw, I40E_PF_ARQLEN, (hw->aq.num_arq_entries |
|
||||
I40E_PF_ARQLEN_ARQENABLE_MASK));
|
||||
reg = rd32(hw, I40E_PF_ARQBAL);
|
||||
}
|
||||
|
||||
/* Update tail in the HW to post pre-allocated buffers */
|
||||
wr32(hw, hw->aq.arq.tail, hw->aq.num_arq_entries - 1);
|
||||
|
||||
/* Check one register to verify that config was applied */
|
||||
if (reg != lower_32_bits(hw->aq.arq.desc_buf.pa))
|
||||
ret_code = I40E_ERR_ADMIN_QUEUE_ERROR;
|
||||
|
||||
return ret_code;
|
||||
}
|
||||
|
||||
/**
|
||||
@ -385,7 +407,9 @@ static i40e_status i40e_init_asq(struct i40e_hw *hw)
|
||||
goto init_adminq_free_rings;
|
||||
|
||||
/* initialize base registers */
|
||||
i40e_config_asq_regs(hw);
|
||||
ret_code = i40e_config_asq_regs(hw);
|
||||
if (ret_code)
|
||||
goto init_adminq_free_rings;
|
||||
|
||||
/* success! */
|
||||
goto init_adminq_exit;
|
||||
@ -442,7 +466,9 @@ static i40e_status i40e_init_arq(struct i40e_hw *hw)
|
||||
goto init_adminq_free_rings;
|
||||
|
||||
/* initialize base registers */
|
||||
i40e_config_arq_regs(hw);
|
||||
ret_code = i40e_config_arq_regs(hw);
|
||||
if (ret_code)
|
||||
goto init_adminq_free_rings;
|
||||
|
||||
/* success! */
|
||||
goto init_adminq_exit;
|
||||
|
||||
@ -1585,6 +1585,14 @@
|
||||
#define I40E_GLLAN_TSOMSK_M 0x000442DC
|
||||
#define I40E_GLLAN_TSOMSK_M_TCPMSKM_SHIFT 0
|
||||
#define I40E_GLLAN_TSOMSK_M_TCPMSKM_MASK (0xFFF << I40E_GLLAN_TSOMSK_M_TCPMSKM_SHIFT)
|
||||
#define I40E_GLLAN_TXPRE_QDIS(_i) (0x000E6500 + ((_i) * 4)) /* i=0..11 */
|
||||
#define I40E_GLLAN_TXPRE_QDIS_QINDX_SHIFT 0
|
||||
#define I40E_GLLAN_TXPRE_QDIS_QINDX_MASK (0x7FF << I40E_GLLAN_TXPRE_QDIS_QINDX_SHIFT)
|
||||
#define I40E_GLLAN_TXPRE_QDIS_SET_QDIS_SHIFT 30
|
||||
#define I40E_GLLAN_TXPRE_QDIS_SET_QDIS_MASK (0x1 << I40E_GLLAN_TXPRE_QDIS_SET_QDIS_SHIFT)
|
||||
#define I40E_GLLAN_TXPRE_QDIS_CLEAR_QDIS_SHIFT 31
|
||||
#define I40E_GLLAN_TXPRE_QDIS_CLEAR_QDIS_MASK (0x1 << I40E_GLLAN_TXPRE_QDIS_CLEAR_QDIS_SHIFT)
|
||||
|
||||
#define I40E_PFLAN_QALLOC 0x001C0400
|
||||
#define I40E_PFLAN_QALLOC_FIRSTQ_SHIFT 0
|
||||
#define I40E_PFLAN_QALLOC_FIRSTQ_MASK (0x7FF << I40E_PFLAN_QALLOC_FIRSTQ_SHIFT)
|
||||
|
||||
@ -36,7 +36,7 @@ char i40evf_driver_name[] = "i40evf";
|
||||
static const char i40evf_driver_string[] =
|
||||
"Intel(R) XL710 X710 Virtual Function Network Driver";
|
||||
|
||||
#define DRV_VERSION "0.9.23"
|
||||
#define DRV_VERSION "0.9.27"
|
||||
const char i40evf_driver_version[] = DRV_VERSION;
|
||||
static const char i40evf_copyright[] =
|
||||
"Copyright (c) 2013 - 2014 Intel Corporation.";
|
||||
@ -1963,7 +1963,7 @@ static void i40evf_init_task(struct work_struct *work)
|
||||
}
|
||||
err = i40evf_check_reset_complete(hw);
|
||||
if (err) {
|
||||
dev_err(&pdev->dev, "Device is still in reset (%d)\n",
|
||||
dev_info(&pdev->dev, "Device is still in reset (%d), retrying\n",
|
||||
err);
|
||||
goto err;
|
||||
}
|
||||
@ -1996,7 +1996,7 @@ static void i40evf_init_task(struct work_struct *work)
|
||||
/* aq msg sent, awaiting reply */
|
||||
err = i40evf_verify_api_ver(adapter);
|
||||
if (err) {
|
||||
dev_err(&pdev->dev, "Unable to verify API version (%d)\n",
|
||||
dev_info(&pdev->dev, "Unable to verify API version (%d), retrying\n",
|
||||
err);
|
||||
goto err;
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user