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clocksource: use clockevents_config_and_register() where possible
The clockevent core is able to figure out the best mult and shift, calculate min_delta_ns and max_delta_ns, with the necessary info passed into clockevents_config_and_register(). Use this combined configure and register function where possible to make the codes less error prone and gain some positive diff stat. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Cc: Andres Salomon <dilinger@queued.net> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Olof Johansson <olof@lixom.net>
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@ -100,7 +100,6 @@ static struct clock_event_device cs5535_clockevent = {
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.set_mode = mfgpt_set_mode,
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.set_next_event = mfgpt_next_event,
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.rating = 250,
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.shift = 32
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};
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static irqreturn_t mfgpt_tick(int irq, void *dev_id)
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@ -169,17 +168,11 @@ static int __init cs5535_mfgpt_init(void)
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cs5535_mfgpt_write(cs5535_event_clock, MFGPT_REG_SETUP, val);
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/* Set up the clock event */
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cs5535_clockevent.mult = div_sc(MFGPT_HZ, NSEC_PER_SEC,
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cs5535_clockevent.shift);
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cs5535_clockevent.min_delta_ns = clockevent_delta2ns(0xF,
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&cs5535_clockevent);
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cs5535_clockevent.max_delta_ns = clockevent_delta2ns(0xFFFE,
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&cs5535_clockevent);
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printk(KERN_INFO DRV_NAME
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": Registering MFGPT timer as a clock event, using IRQ %d\n",
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timer_irq);
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clockevents_register_device(&cs5535_clockevent);
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clockevents_config_and_register(&cs5535_clockevent, MFGPT_HZ,
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0xF, 0xFFFE);
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return 0;
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@ -74,7 +74,6 @@ static int sunxi_clkevt_next_event(unsigned long evt,
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static struct clock_event_device sunxi_clockevent = {
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.name = "sunxi_tick",
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.shift = 32,
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.rating = 300,
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.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
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.set_mode = sunxi_clkevt_mode,
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@ -154,16 +153,10 @@ static void __init sunxi_timer_init(void)
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val = readl(timer_base + TIMER_CTL_REG);
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writel(val | TIMER_CTL_ENABLE, timer_base + TIMER_CTL_REG);
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sunxi_clockevent.mult = div_sc(rate / TIMER_SCAL,
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NSEC_PER_SEC,
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sunxi_clockevent.shift);
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sunxi_clockevent.max_delta_ns = clockevent_delta2ns(0xff,
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&sunxi_clockevent);
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sunxi_clockevent.min_delta_ns = clockevent_delta2ns(0x1,
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&sunxi_clockevent);
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sunxi_clockevent.cpumask = cpumask_of(0);
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clockevents_register_device(&sunxi_clockevent);
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clockevents_config_and_register(&sunxi_clockevent, rate / TIMER_SCAL,
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0x1, 0xff);
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}
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struct sys_timer sunxi_timer = {
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@ -157,7 +157,6 @@ static struct tc_clkevt_device clkevt = {
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.name = "tc_clkevt",
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.features = CLOCK_EVT_FEAT_PERIODIC
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| CLOCK_EVT_FEAT_ONESHOT,
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.shift = 32,
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/* Should be lower than at91rm9200's system timer */
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.rating = 125,
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.set_next_event = tc_next_event,
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@ -196,13 +195,9 @@ static void __init setup_clkevents(struct atmel_tc *tc, int clk32k_divisor_idx)
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timer_clock = clk32k_divisor_idx;
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clkevt.clkevt.mult = div_sc(32768, NSEC_PER_SEC, clkevt.clkevt.shift);
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clkevt.clkevt.max_delta_ns
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= clockevent_delta2ns(0xffff, &clkevt.clkevt);
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clkevt.clkevt.min_delta_ns = clockevent_delta2ns(1, &clkevt.clkevt) + 1;
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clkevt.clkevt.cpumask = cpumask_of(0);
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clockevents_register_device(&clkevt.clkevt);
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clockevents_config_and_register(&clkevt.clkevt, 32768, 1, 0xffff);
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setup_irq(irq, &tc_irqaction);
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}
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