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rt2x00: Move all register definitions for rt2800 to rt2800.h.

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There is no point on having them separated across 3 files.
At the same time rename USB_CYC_CFG to its proper name US_CYC_CNT
(as per the datasheet).

Signed-off-by: Gertjan van Wingerde <gwingerde@gmail.com>
Signed-off-by: Ivo van Doorn <IvDoorn@gmail.com>
This commit is contained in:
Gertjan van Wingerde 2010-06-03 10:51:59 +02:00 committed by Ivo van Doorn
parent 5ed8f4582a
commit 785c3c06fb
4 changed files with 51 additions and 59 deletions
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48
drivers/net/wireless/rt2x00/rt2800.h
View File

@ -97,6 +97,21 @@
* Registers.
*/
/*
* E2PROM_CSR: PCI EEPROM control register.
* RELOAD: Write 1 to reload eeprom content.
* TYPE: 0: 93c46, 1:93c66.
* LOAD_STATUS: 1:loading, 0:done.
*/
#define E2PROM_CSR 0x0004
#define E2PROM_CSR_DATA_CLOCK FIELD32(0x00000001)
#define E2PROM_CSR_CHIP_SELECT FIELD32(0x00000002)
#define E2PROM_CSR_DATA_IN FIELD32(0x00000004)
#define E2PROM_CSR_DATA_OUT FIELD32(0x00000008)
#define E2PROM_CSR_TYPE FIELD32(0x00000030)
#define E2PROM_CSR_LOAD_STATUS FIELD32(0x00000040)
#define E2PROM_CSR_RELOAD FIELD32(0x00000080)
/*
* OPT_14: Unknown register used by rt3xxx devices.
*/
@ -320,6 +335,39 @@
#define RX_CRX_IDX 0x0298
#define RX_DRX_IDX 0x029c
/*
* USB_DMA_CFG
* RX_BULK_AGG_TIMEOUT: Rx Bulk Aggregation TimeOut in unit of 33ns.
* RX_BULK_AGG_LIMIT: Rx Bulk Aggregation Limit in unit of 256 bytes.
* PHY_CLEAR: phy watch dog enable.
* TX_CLEAR: Clear USB DMA TX path.
* TXOP_HALT: Halt TXOP count down when TX buffer is full.
* RX_BULK_AGG_EN: Enable Rx Bulk Aggregation.
* RX_BULK_EN: Enable USB DMA Rx.
* TX_BULK_EN: Enable USB DMA Tx.
* EP_OUT_VALID: OUT endpoint data valid.
* RX_BUSY: USB DMA RX FSM busy.
* TX_BUSY: USB DMA TX FSM busy.
*/
#define USB_DMA_CFG 0x02a0
#define USB_DMA_CFG_RX_BULK_AGG_TIMEOUT FIELD32(0x000000ff)
#define USB_DMA_CFG_RX_BULK_AGG_LIMIT FIELD32(0x0000ff00)
#define USB_DMA_CFG_PHY_CLEAR FIELD32(0x00010000)
#define USB_DMA_CFG_TX_CLEAR FIELD32(0x00080000)
#define USB_DMA_CFG_TXOP_HALT FIELD32(0x00100000)
#define USB_DMA_CFG_RX_BULK_AGG_EN FIELD32(0x00200000)
#define USB_DMA_CFG_RX_BULK_EN FIELD32(0x00400000)
#define USB_DMA_CFG_TX_BULK_EN FIELD32(0x00800000)
#define USB_DMA_CFG_EP_OUT_VALID FIELD32(0x3f000000)
#define USB_DMA_CFG_RX_BUSY FIELD32(0x40000000)
#define USB_DMA_CFG_TX_BUSY FIELD32(0x80000000)
/*
* US_CYC_CNT
*/
#define US_CYC_CNT 0x02a4
#define US_CYC_CNT_CLOCK_CYCLE FIELD32(0x000000ff)
/*
* PBF_SYS_CTRL
* HOST_RAM_WRITE: enable Host program ram write selection

6
drivers/net/wireless/rt2x00/rt2800lib.c
View File

@ -1620,9 +1620,9 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
rt2800_register_write(rt2x00dev, HW_BEACON_BASE7, 0);
if (rt2x00_is_usb(rt2x00dev)) {
rt2800_register_read(rt2x00dev, USB_CYC_CFG, &reg);
rt2x00_set_field32(&reg, USB_CYC_CFG_CLOCK_CYCLE, 30);
rt2800_register_write(rt2x00dev, USB_CYC_CFG, reg);
rt2800_register_read(rt2x00dev, US_CYC_CNT, &reg);
rt2x00_set_field32(&reg, US_CYC_CNT_CLOCK_CYCLE, 30);
rt2800_register_write(rt2x00dev, US_CYC_CNT, reg);
}
rt2800_register_read(rt2x00dev, HT_FBK_CFG0, &reg);

19
drivers/net/wireless/rt2x00/rt2800pci.h
View File

@ -34,25 +34,6 @@
#ifndef RT2800PCI_H
#define RT2800PCI_H
/*
* PCI registers.
*/
/*
* E2PROM_CSR: EEPROM control register.
* RELOAD: Write 1 to reload eeprom content.
* TYPE: 0: 93c46, 1:93c66.
* LOAD_STATUS: 1:loading, 0:done.
*/
#define E2PROM_CSR 0x0004
#define E2PROM_CSR_DATA_CLOCK FIELD32(0x00000001)
#define E2PROM_CSR_CHIP_SELECT FIELD32(0x00000002)
#define E2PROM_CSR_DATA_IN FIELD32(0x00000004)
#define E2PROM_CSR_DATA_OUT FIELD32(0x00000008)
#define E2PROM_CSR_TYPE FIELD32(0x00000030)
#define E2PROM_CSR_LOAD_STATUS FIELD32(0x00000040)
#define E2PROM_CSR_RELOAD FIELD32(0x00000080)
/*
* Queue register offset macros
*/

37
drivers/net/wireless/rt2x00/rt2800usb.h
View File

@ -31,43 +31,6 @@
#ifndef RT2800USB_H
#define RT2800USB_H
/*
* USB registers.
*/
/*
* USB_DMA_CFG
* RX_BULK_AGG_TIMEOUT: Rx Bulk Aggregation TimeOut in unit of 33ns.
* RX_BULK_AGG_LIMIT: Rx Bulk Aggregation Limit in unit of 256 bytes.
* PHY_CLEAR: phy watch dog enable.
* TX_CLEAR: Clear USB DMA TX path.
* TXOP_HALT: Halt TXOP count down when TX buffer is full.
* RX_BULK_AGG_EN: Enable Rx Bulk Aggregation.
* RX_BULK_EN: Enable USB DMA Rx.
* TX_BULK_EN: Enable USB DMA Tx.
* EP_OUT_VALID: OUT endpoint data valid.
* RX_BUSY: USB DMA RX FSM busy.
* TX_BUSY: USB DMA TX FSM busy.
*/
#define USB_DMA_CFG 0x02a0
#define USB_DMA_CFG_RX_BULK_AGG_TIMEOUT FIELD32(0x000000ff)
#define USB_DMA_CFG_RX_BULK_AGG_LIMIT FIELD32(0x0000ff00)
#define USB_DMA_CFG_PHY_CLEAR FIELD32(0x00010000)
#define USB_DMA_CFG_TX_CLEAR FIELD32(0x00080000)
#define USB_DMA_CFG_TXOP_HALT FIELD32(0x00100000)
#define USB_DMA_CFG_RX_BULK_AGG_EN FIELD32(0x00200000)
#define USB_DMA_CFG_RX_BULK_EN FIELD32(0x00400000)
#define USB_DMA_CFG_TX_BULK_EN FIELD32(0x00800000)
#define USB_DMA_CFG_EP_OUT_VALID FIELD32(0x3f000000)
#define USB_DMA_CFG_RX_BUSY FIELD32(0x40000000)
#define USB_DMA_CFG_TX_BUSY FIELD32(0x80000000)
/*
* USB_CYC_CFG
*/
#define USB_CYC_CFG 0x02a4
#define USB_CYC_CFG_CLOCK_CYCLE FIELD32(0x000000ff)
/*
* 8051 firmware image.
*/