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perf/x86/intel: Add Broadwell support for the LBR callstack
Same as Haswell, Broadwell also support the LBR callstack. Signed-off-by: Kan Liang <kan.liang@intel.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Acked-by: Andi Kleen <ak@linux.intel.com> Link: http://lkml.kernel.org/r/1427962377-40955-1-git-send-email-kan.liang@intel.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
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@ -3275,7 +3275,7 @@ __init int intel_pmu_init(void)
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hw_cache_extra_regs[C(NODE)][C(OP_WRITE)][C(RESULT_ACCESS)] = HSW_DEMAND_WRITE|
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BDW_L3_MISS_LOCAL|HSW_SNOOP_DRAM;
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intel_pmu_lbr_init_snb();
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intel_pmu_lbr_init_hsw();
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x86_pmu.event_constraints = intel_bdw_event_constraints;
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x86_pmu.pebs_constraints = intel_hsw_pebs_event_constraints;
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