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sh64: Wire up the shared __flush_xxx_region() flushers.
Now with all of the prep work out of the way, kill off the SH-5 variants and use the SH-4 version directly. This also takes advantage of the unrolling that was previously done for the new version. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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@ -9,7 +9,7 @@ mmu-$(CONFIG_MMU) := fault_64.o ioremap_64.o tlbflush_64.o tlb-sh5.o \
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extable_64.o
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ifndef CONFIG_CACHE_OFF
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obj-y += cache-sh5.o
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obj-y += cache-sh5.o flush-sh4.o
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endif
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obj-y += $(mmu-y)
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@ -539,54 +539,6 @@ static void sh64_dcache_purge_user_range(struct mm_struct *mm,
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sh64_dcache_purge_user_pages(mm, start, end);
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}
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}
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/*
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* Purge the range of addresses from the D-cache.
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*
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* The addresses lie in the superpage mapping. There's no harm if we
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* overpurge at either end - just a small performance loss.
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*/
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void __flush_purge_region(void *start, int size)
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{
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unsigned long long ullend, addr, aligned_start;
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aligned_start = (unsigned long long)(signed long long)(signed long) start;
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addr = L1_CACHE_ALIGN(aligned_start);
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ullend = (unsigned long long) (signed long long) (signed long) start + size;
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while (addr <= ullend) {
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__asm__ __volatile__ ("ocbp %0, 0" : : "r" (addr));
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addr += L1_CACHE_BYTES;
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}
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}
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void __flush_wback_region(void *start, int size)
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{
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unsigned long long ullend, addr, aligned_start;
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aligned_start = (unsigned long long)(signed long long)(signed long) start;
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addr = L1_CACHE_ALIGN(aligned_start);
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ullend = (unsigned long long) (signed long long) (signed long) start + size;
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while (addr < ullend) {
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__asm__ __volatile__ ("ocbwb %0, 0" : : "r" (addr));
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addr += L1_CACHE_BYTES;
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}
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}
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void __flush_invalidate_region(void *start, int size)
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{
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unsigned long long ullend, addr, aligned_start;
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aligned_start = (unsigned long long)(signed long long)(signed long) start;
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addr = L1_CACHE_ALIGN(aligned_start);
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ullend = (unsigned long long) (signed long long) (signed long) start + size;
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while (addr < ullend) {
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__asm__ __volatile__ ("ocbi %0, 0" : : "r" (addr));
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addr += L1_CACHE_BYTES;
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}
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}
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#endif /* !CONFIG_DCACHE_DISABLED */
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/*
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