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uli526x partially recognizing interface
Patch fixes: http://bugzilla.kernel.org/show_bug.cgi?id=5839 Init sequence needs to poll phy until phy reset is complete. This is the same problem that I fixed in 2002 in tulip driver. Thanks to manty@manty.net for testing this patch. Thanks to Pozsar Balazs <pozsy@uhulinux.hu> for posting/testing a similar patch before: http://lkml.org/lkml/2006/8/21/45 Signed-off-by: Grant Grundler <grundler@parisc-linux.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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@ -482,9 +482,11 @@ static void uli526x_init(struct net_device *dev)
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struct uli526x_board_info *db = netdev_priv(dev);
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unsigned long ioaddr = db->ioaddr;
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u8 phy_tmp;
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u8 timeout;
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u16 phy_value;
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u16 phy_reg_reset;
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ULI526X_DBUG(0, "uli526x_init()", 0);
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/* Reset M526x MAC controller */
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@ -509,11 +511,19 @@ static void uli526x_init(struct net_device *dev)
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/* Parser SROM and media mode */
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db->media_mode = uli526x_media_mode;
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/* Phyxcer capability setting */
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/* phyxcer capability setting */
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phy_reg_reset = phy_read(db->ioaddr, db->phy_addr, 0, db->chip_id);
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phy_reg_reset = (phy_reg_reset | 0x8000);
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phy_write(db->ioaddr, db->phy_addr, 0, phy_reg_reset, db->chip_id);
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/* See IEEE 802.3-2002.pdf (Section 2, Chapter "22.2.4 Management
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* functions") or phy data sheet for details on phy reset
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*/
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udelay(500);
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timeout = 10;
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while (timeout-- &&
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phy_read(db->ioaddr, db->phy_addr, 0, db->chip_id) & 0x8000)
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udelay(100);
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/* Process Phyxcer Media Mode */
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uli526x_set_phyxcer(db);
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