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staging: fsl-mc: Move irqchip code out of staging

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Now that the fsl-mc bus core infrastructure is out of staging, the
remaining irqchip glue code used (irq-gic-v3-its-fsl-mc-msi.c) goes
to drivers/irqchip.

Create new Kconfig option for irqchip code that depends on
FSL_MC_BUS and ARM_GIC_V3_ITS. This ensures irqchip code only
gets built on ARM64 platforms. We can now remove #ifdef
GENERIC_MSI_DOMAIN_OPS as it was only needed for x86.

Signed-off-by: Stuart Yoder <stuyoder@gmail.com>
[rebased, add dpaa2_eth and dpio #include updates]
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
[rebased, split irqchip to separate patch]
Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
[add Kconfig dependency on ARM_GIC_V3_ITS]
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Bogdan Purcareata 2018-02-05 08:07:43 -06:00 committed by Greg Kroah-Hartman
parent 6bd067c48e
commit 7afe031c1a
4 changed files with 8 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
drivers/irqchip/Kconfig
View File

@ -51,6 +51,12 @@ config ARM_GIC_V3_ITS_PCI
depends on PCI_MSI
default ARM_GIC_V3_ITS
config ARM_GIC_V3_ITS_FSL_MC
bool
depends on ARM_GIC_V3_ITS
depends on FSL_MC_BUS
default ARM_GIC_V3_ITS
config ARM_NVIC
bool
select IRQ_DOMAIN

1
drivers/irqchip/Makefile
View File

@ -32,6 +32,7 @@ obj-$(CONFIG_ARM_GIC_V2M) += irq-gic-v2m.o
obj-$(CONFIG_ARM_GIC_V3) += irq-gic-v3.o irq-gic-common.o
obj-$(CONFIG_ARM_GIC_V3_ITS) += irq-gic-v3-its.o irq-gic-v3-its-platform-msi.o irq-gic-v4.o
obj-$(CONFIG_ARM_GIC_V3_ITS_PCI) += irq-gic-v3-its-pci-msi.o
obj-$(CONFIG_ARM_GIC_V3_ITS_FSL_MC) += irq-gic-v3-its-fsl-mc-msi.o
obj-$(CONFIG_PARTITION_PERCPU) += irq-partition-percpu.o
obj-$(CONFIG_HISILICON_IRQ_MBIGEN) += irq-mbigen.o
obj-$(CONFIG_ARM_NVIC) += irq-nvic.o

2
drivers/staging/fsl-mc/bus/irq-gic-v3-its-fsl-mc-msi.c → drivers/irqchip/irq-gic-v3-its-fsl-mc-msi.c
View File

@ -43,9 +43,7 @@ static int its_fsl_mc_msi_prepare(struct irq_domain *msi_domain,
* NOTE: This device id corresponds to the IOMMU stream ID
* associated with the DPRC object (ICID).
*/
#ifdef GENERIC_MSI_DOMAIN_OPS
info->scratchpad[0].ul = mc_bus_dev->icid;
#endif
msi_info = msi_get_domain_info(msi_domain->parent);
return msi_info->ops->msi_prepare(msi_domain->parent, dev, nvec, info);
}

3
drivers/staging/fsl-mc/bus/Makefile
View File

@ -4,8 +4,7 @@
#
# Copyright (C) 2014 Freescale Semiconductor, Inc.
#
obj-$(CONFIG_FSL_MC_BUS) += irq-gic-v3-its-fsl-mc-msi.o \
dpbp.o \
obj-$(CONFIG_FSL_MC_BUS) += dpbp.o \
dpcon.o
# MC DPIO driver