FEX-Emu/linux
1
0
Fork 0
mirror of https://github.com/FEX-Emu/linux.git synced 2024-12-30 05:15:03 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

[SCSI] qla4xxx: Add read/update NVRAM support for 40xx adapters using BSG

Browse Source 
Signed-off-by: Harish Zunjarrao <harish.zunjarrao@qlogic.com>
Signed-off-by: Vikas Chaudhary <vikas.chaudhary@qlogic.com>
Reviewed-by: Mike Christie <michaelc@cs.wisc.edu>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
This commit is contained in:
Harish Zunjarrao 2011-08-01 03:26:16 -07:00 committed by James Bottomley
parent 8b0402e138
commit 7c07d139cf
5 changed files with 210 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

147
drivers/scsi/qla4xxx/ql4_bsg.c
View File

@ -196,6 +196,147 @@ leave:
return rval;
}
static int
qla4xxx_read_nvram(struct bsg_job *bsg_job)
{
struct Scsi_Host *host = iscsi_job_to_shost(bsg_job);
struct scsi_qla_host *ha = to_qla_host(host);
struct iscsi_bsg_request *bsg_req = bsg_job->request;
struct iscsi_bsg_reply *bsg_reply = bsg_job->reply;
uint32_t offset = 0;
uint32_t len = 0;
uint32_t total_len = 0;
dma_addr_t nvram_dma;
uint8_t *nvram = NULL;
int rval = -EINVAL;
bsg_reply->reply_payload_rcv_len = 0;
if (unlikely(pci_channel_offline(ha->pdev)))
goto leave;
/* Only 40xx adapters are supported */
if (!(is_qla4010(ha) || is_qla4022(ha) || is_qla4032(ha)))
goto leave;
if (ql4xxx_reset_active(ha)) {
ql4_printk(KERN_ERR, ha, "%s: reset active\n", __func__);
rval = -EBUSY;
goto leave;
}
offset = bsg_req->rqst_data.h_vendor.vendor_cmd[1];
len = bsg_job->reply_payload.payload_len;
total_len = offset + len;
/* total len should not be greater than max NVRAM size */
if ((is_qla4010(ha) && total_len > QL4010_NVRAM_SIZE) ||
((is_qla4022(ha) || is_qla4032(ha)) &&
total_len > QL40X2_NVRAM_SIZE)) {
ql4_printk(KERN_ERR, ha, "%s: offset+len greater than max"
" nvram size, offset=%d len=%d\n",
__func__, offset, len);
goto leave;
}
nvram = dma_alloc_coherent(&ha->pdev->dev, len, &nvram_dma,
GFP_KERNEL);
if (!nvram) {
ql4_printk(KERN_ERR, ha, "%s: dma alloc failed for nvram "
"data\n", __func__);
rval = -ENOMEM;
goto leave;
}
rval = qla4xxx_get_nvram(ha, nvram_dma, offset, len);
if (rval) {
ql4_printk(KERN_ERR, ha, "%s: get nvram failed\n", __func__);
bsg_reply->result = DID_ERROR << 16;
rval = -EIO;
} else {
bsg_reply->reply_payload_rcv_len =
sg_copy_from_buffer(bsg_job->reply_payload.sg_list,
bsg_job->reply_payload.sg_cnt,
nvram, len);
bsg_reply->result = DID_OK << 16;
}
bsg_job_done(bsg_job, bsg_reply->result,
bsg_reply->reply_payload_rcv_len);
dma_free_coherent(&ha->pdev->dev, len, nvram, nvram_dma);
leave:
return rval;
}
static int
qla4xxx_update_nvram(struct bsg_job *bsg_job)
{
struct Scsi_Host *host = iscsi_job_to_shost(bsg_job);
struct scsi_qla_host *ha = to_qla_host(host);
struct iscsi_bsg_request *bsg_req = bsg_job->request;
struct iscsi_bsg_reply *bsg_reply = bsg_job->reply;
uint32_t offset = 0;
uint32_t len = 0;
uint32_t total_len = 0;
dma_addr_t nvram_dma;
uint8_t *nvram = NULL;
int rval = -EINVAL;
bsg_reply->reply_payload_rcv_len = 0;
if (unlikely(pci_channel_offline(ha->pdev)))
goto leave;
if (!(is_qla4010(ha) || is_qla4022(ha) || is_qla4032(ha)))
goto leave;
if (ql4xxx_reset_active(ha)) {
ql4_printk(KERN_ERR, ha, "%s: reset active\n", __func__);
rval = -EBUSY;
goto leave;
}
offset = bsg_req->rqst_data.h_vendor.vendor_cmd[1];
len = bsg_job->request_payload.payload_len;
total_len = offset + len;
/* total len should not be greater than max NVRAM size */
if ((is_qla4010(ha) && total_len > QL4010_NVRAM_SIZE) ||
((is_qla4022(ha) || is_qla4032(ha)) &&
total_len > QL40X2_NVRAM_SIZE)) {
ql4_printk(KERN_ERR, ha, "%s: offset+len greater than max"
" nvram size, offset=%d len=%d\n",
__func__, offset, len);
goto leave;
}
nvram = dma_alloc_coherent(&ha->pdev->dev, len, &nvram_dma,
GFP_KERNEL);
if (!nvram) {
ql4_printk(KERN_ERR, ha, "%s: dma alloc failed for flash "
"data\n", __func__);
rval = -ENOMEM;
goto leave;
}
sg_copy_to_buffer(bsg_job->request_payload.sg_list,
bsg_job->request_payload.sg_cnt, nvram, len);
rval = qla4xxx_set_nvram(ha, nvram_dma, offset, len);
if (rval) {
ql4_printk(KERN_ERR, ha, "%s: set nvram failed\n", __func__);
bsg_reply->result = DID_ERROR << 16;
rval = -EIO;
} else
bsg_reply->result = DID_OK << 16;
bsg_job_done(bsg_job, bsg_reply->result,
bsg_reply->reply_payload_rcv_len);
dma_free_coherent(&ha->pdev->dev, len, nvram, nvram_dma);
leave:
return rval;
}
/**
* qla4xxx_process_vendor_specific - handle vendor specific bsg request
* @job: iscsi_bsg_job to handle
@ -217,6 +358,12 @@ int qla4xxx_process_vendor_specific(struct bsg_job *bsg_job)
case QLISCSI_VND_GET_ACB_STATE:
return qla4xxx_get_acb_state(bsg_job);
case QLISCSI_VND_READ_NVRAM:
return qla4xxx_read_nvram(bsg_job);
case QLISCSI_VND_UPDATE_NVRAM:
return qla4xxx_update_nvram(bsg_job);
default:
ql4_printk(KERN_ERR, ha, "%s: invalid BSG vendor command: "
"0x%x\n", __func__, bsg_req->msgcode);

2
drivers/scsi/qla4xxx/ql4_bsg.h
View File

@ -11,5 +11,7 @@
#define QLISCSI_VND_READ_FLASH 1
#define QLISCSI_VND_UPDATE_FLASH 2
#define QLISCSI_VND_GET_ACB_STATE 3
#define QLISCSI_VND_READ_NVRAM 4
#define QLISCSI_VND_UPDATE_NVRAM 5
#endif

5
drivers/scsi/qla4xxx/ql4_fw.h
View File

@ -201,6 +201,9 @@ static inline uint32_t clr_rmask(uint32_t val)
/* ISP 4022 nvram definitions */
#define NVR_WRITE_ENABLE 0x00000010 /* 4022 */
#define QL4010_NVRAM_SIZE 0x200
#define QL40X2_NVRAM_SIZE 0x800
/* ISP port_status definitions */
/* ISP Semaphore definitions */
@ -359,6 +362,8 @@ struct qla_flt_region {
#define MBOX_CMD_GET_FW_STATE 0x0069
#define MBOX_CMD_GET_INIT_FW_CTRL_BLOCK_DEFAULTS 0x006A
#define MBOX_CMD_GET_SYS_INFO 0x0078
#define MBOX_CMD_GET_NVRAM 0x0078 /* For 40xx */
#define MBOX_CMD_SET_NVRAM 0x0079 /* For 40xx */
#define MBOX_CMD_RESTORE_FACTORY_DEFAULTS 0x0087
#define MBOX_CMD_SET_ACB 0x0088
#define MBOX_CMD_GET_ACB 0x0089

4
drivers/scsi/qla4xxx/ql4_glbl.h
View File

@ -162,6 +162,10 @@ int qla4xxx_bootdb_by_index(struct scsi_qla_host *ha,
dma_addr_t fw_ddb_entry_dma, uint16_t ddb_index);
int qla4xxx_get_chap(struct scsi_qla_host *ha, char *username,
char *password, uint16_t idx);
int qla4xxx_get_nvram(struct scsi_qla_host *ha, dma_addr_t nvram_dma,
uint32_t offset, uint32_t size);
int qla4xxx_set_nvram(struct scsi_qla_host *ha, dma_addr_t nvram_dma,
uint32_t offset, uint32_t size);
/* BSG Functions */
int qla4xxx_bsg_request(struct bsg_job *bsg_job);

52
drivers/scsi/qla4xxx/ql4_mbx.c
View File

@ -1690,3 +1690,55 @@ int qla4xxx_get_ip_state(struct scsi_qla_host *ha, uint32_t acb_idx,
memcpy(sts, mbox_sts, sizeof(mbox_sts));
return status;
}
int qla4xxx_get_nvram(struct scsi_qla_host *ha, dma_addr_t nvram_dma,
uint32_t offset, uint32_t size)
{
int status = QLA_SUCCESS;
uint32_t mbox_cmd[MBOX_REG_COUNT];
uint32_t mbox_sts[MBOX_REG_COUNT];
memset(&mbox_cmd, 0, sizeof(mbox_cmd));
memset(&mbox_sts, 0, sizeof(mbox_sts));
mbox_cmd[0] = MBOX_CMD_GET_NVRAM;
mbox_cmd[1] = LSDW(nvram_dma);
mbox_cmd[2] = MSDW(nvram_dma);
mbox_cmd[3] = offset;
mbox_cmd[4] = size;
status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0],
&mbox_sts[0]);
if (status != QLA_SUCCESS) {
DEBUG2(ql4_printk(KERN_ERR, ha, "scsi%ld: %s: failed "
"status %04X\n", ha->host_no, __func__,
mbox_sts[0]));
}
return status;
}
int qla4xxx_set_nvram(struct scsi_qla_host *ha, dma_addr_t nvram_dma,
uint32_t offset, uint32_t size)
{
int status = QLA_SUCCESS;
uint32_t mbox_cmd[MBOX_REG_COUNT];
uint32_t mbox_sts[MBOX_REG_COUNT];
memset(&mbox_cmd, 0, sizeof(mbox_cmd));
memset(&mbox_sts, 0, sizeof(mbox_sts));
mbox_cmd[0] = MBOX_CMD_SET_NVRAM;
mbox_cmd[1] = LSDW(nvram_dma);
mbox_cmd[2] = MSDW(nvram_dma);
mbox_cmd[3] = offset;
mbox_cmd[4] = size;
status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0],
&mbox_sts[0]);
if (status != QLA_SUCCESS) {
DEBUG2(ql4_printk(KERN_ERR, ha, "scsi%ld: %s: failed "
"status %04X\n", ha->host_no, __func__,
mbox_sts[0]));
}
return status;
}