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perf tools: fix a typo of a Power7 event name
In the Power7 PMU guide: https://www.power.org/documentation/commonly-used-metrics-for-performance-analysis/ PM_BRU_MPRED is referred to as PM_BR_MPRED. It fixed the typo by changing the name of the event in kernel and documentation accordingly. This patch changes the ABI, there are some reasons I think it's ok: - It is relatively new interface, specific to the Power7 platform. - No tools that we know of actually use this interface at this point (none are listed near the interface). - Users of this interface (eg oprofile users migrating to perf) would be more used to the "PM_BR_MPRED" rather than "PM_BRU_MPRED". - These are in the ABI/testing at this point rather than ABI/stable, so hoping we have some wiggle room. Signed-off-by: Runzhen Wang <runzhen@linux.vnet.ibm.com> Acked-by: Michael Ellerman <michael@ellerman.id.au> Cc: icycoder@gmail.com Cc: linuxppc-dev@lists.ozlabs.org Cc: Michael Ellerman <michael@ellerman.id.au> Cc: Paul Mackerras <paulus@samba.org> Cc: Runzhen Wang <runzhew@clemson.edu> Cc: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com> Cc: Xiao Guangrong <xiaoguangrong@linux.vnet.ibm.com> Link: http://lkml.kernel.org/r/1372407297-6996-2-git-send-email-runzhen@linux.vnet.ibm.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
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@ -29,7 +29,7 @@ Description: Generic performance monitoring events
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What: /sys/devices/cpu/events/PM_1PLUS_PPC_CMPL
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/sys/devices/cpu/events/PM_BRU_FIN
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/sys/devices/cpu/events/PM_BRU_MPRED
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/sys/devices/cpu/events/PM_BR_MPRED
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/sys/devices/cpu/events/PM_CMPLU_STALL
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/sys/devices/cpu/events/PM_CMPLU_STALL_BRU
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/sys/devices/cpu/events/PM_CMPLU_STALL_DCACHE_MISS
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@ -60,7 +60,7 @@
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#define PME_PM_LD_REF_L1 0xc880
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#define PME_PM_LD_MISS_L1 0x400f0
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#define PME_PM_BRU_FIN 0x10068
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#define PME_PM_BRU_MPRED 0x400f6
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#define PME_PM_BR_MPRED 0x400f6
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#define PME_PM_CMPLU_STALL_FXU 0x20014
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#define PME_PM_CMPLU_STALL_DIV 0x40014
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@ -349,7 +349,7 @@ static int power7_generic_events[] = {
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[PERF_COUNT_HW_CACHE_REFERENCES] = PME_PM_LD_REF_L1,
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[PERF_COUNT_HW_CACHE_MISSES] = PME_PM_LD_MISS_L1,
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[PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = PME_PM_BRU_FIN,
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[PERF_COUNT_HW_BRANCH_MISSES] = PME_PM_BRU_MPRED,
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[PERF_COUNT_HW_BRANCH_MISSES] = PME_PM_BR_MPRED,
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};
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#define C(x) PERF_COUNT_HW_CACHE_##x
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@ -405,7 +405,7 @@ GENERIC_EVENT_ATTR(instructions, INST_CMPL);
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GENERIC_EVENT_ATTR(cache-references, LD_REF_L1);
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GENERIC_EVENT_ATTR(cache-misses, LD_MISS_L1);
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GENERIC_EVENT_ATTR(branch-instructions, BRU_FIN);
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GENERIC_EVENT_ATTR(branch-misses, BRU_MPRED);
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GENERIC_EVENT_ATTR(branch-misses, BR_MPRED);
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POWER_EVENT_ATTR(CYC, CYC);
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POWER_EVENT_ATTR(GCT_NOSLOT_CYC, GCT_NOSLOT_CYC);
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@ -414,7 +414,7 @@ POWER_EVENT_ATTR(INST_CMPL, INST_CMPL);
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POWER_EVENT_ATTR(LD_REF_L1, LD_REF_L1);
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POWER_EVENT_ATTR(LD_MISS_L1, LD_MISS_L1);
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POWER_EVENT_ATTR(BRU_FIN, BRU_FIN)
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POWER_EVENT_ATTR(BRU_MPRED, BRU_MPRED);
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POWER_EVENT_ATTR(BR_MPRED, BR_MPRED);
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POWER_EVENT_ATTR(CMPLU_STALL_FXU, CMPLU_STALL_FXU);
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POWER_EVENT_ATTR(CMPLU_STALL_DIV, CMPLU_STALL_DIV);
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@ -449,7 +449,7 @@ static struct attribute *power7_events_attr[] = {
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GENERIC_EVENT_PTR(LD_REF_L1),
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GENERIC_EVENT_PTR(LD_MISS_L1),
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GENERIC_EVENT_PTR(BRU_FIN),
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GENERIC_EVENT_PTR(BRU_MPRED),
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GENERIC_EVENT_PTR(BR_MPRED),
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POWER_EVENT_PTR(CYC),
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POWER_EVENT_PTR(GCT_NOSLOT_CYC),
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@ -458,7 +458,7 @@ static struct attribute *power7_events_attr[] = {
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POWER_EVENT_PTR(LD_REF_L1),
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POWER_EVENT_PTR(LD_MISS_L1),
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POWER_EVENT_PTR(BRU_FIN),
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POWER_EVENT_PTR(BRU_MPRED),
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POWER_EVENT_PTR(BR_MPRED),
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POWER_EVENT_PTR(CMPLU_STALL_FXU),
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POWER_EVENT_PTR(CMPLU_STALL_DIV),
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