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drm/radeon/ci: force pcie level before sclk and mclk
Preferred ordering. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -4143,6 +4143,25 @@ int ci_dpm_force_performance_level(struct radeon_device *rdev,
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int ret;
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if (level == RADEON_DPM_FORCED_LEVEL_HIGH) {
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if ((!pi->pcie_dpm_key_disabled) &&
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pi->dpm_level_enable_mask.pcie_dpm_enable_mask) {
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levels = 0;
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tmp = pi->dpm_level_enable_mask.pcie_dpm_enable_mask;
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while (tmp >>= 1)
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levels++;
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if (levels) {
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ret = ci_dpm_force_state_pcie(rdev, level);
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if (ret)
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return ret;
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for (i = 0; i < rdev->usec_timeout; i++) {
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tmp = (RREG32_SMC(TARGET_AND_CURRENT_PROFILE_INDEX_1) &
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CURR_PCIE_INDEX_MASK) >> CURR_PCIE_INDEX_SHIFT;
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if (tmp == levels)
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break;
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udelay(1);
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}
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}
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}
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if ((!pi->sclk_dpm_key_disabled) &&
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pi->dpm_level_enable_mask.sclk_dpm_enable_mask) {
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levels = 0;
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@ -4181,25 +4200,6 @@ int ci_dpm_force_performance_level(struct radeon_device *rdev,
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}
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}
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}
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if ((!pi->pcie_dpm_key_disabled) &&
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pi->dpm_level_enable_mask.pcie_dpm_enable_mask) {
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levels = 0;
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tmp = pi->dpm_level_enable_mask.pcie_dpm_enable_mask;
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while (tmp >>= 1)
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levels++;
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if (levels) {
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ret = ci_dpm_force_state_pcie(rdev, level);
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if (ret)
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return ret;
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for (i = 0; i < rdev->usec_timeout; i++) {
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tmp = (RREG32_SMC(TARGET_AND_CURRENT_PROFILE_INDEX_1) &
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CURR_PCIE_INDEX_MASK) >> CURR_PCIE_INDEX_SHIFT;
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if (tmp == levels)
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break;
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udelay(1);
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}
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}
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}
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} else if (level == RADEON_DPM_FORCED_LEVEL_LOW) {
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if ((!pi->sclk_dpm_key_disabled) &&
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pi->dpm_level_enable_mask.sclk_dpm_enable_mask) {
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